A 170‐ to 260‐GHz Full‐Band Frequency Doubler Realized by Impedance Compression Matching Technique

Abstract

In this paper, the bandwidth limitations of frequency multipliers are analyzed theoretically in terms of maximum power transmission. The analysis shows that due to conjugate with the impedance of the diode itself, the optimum embedded impedance of the diode possesses a counterclockwise impedance trajectory versus frequency on the Smith chart, whereas the matching circuit exhibits a clockwise impedance trajectory versus frequency on the Smith chart. Under this constraint, an impedance compression matching technique (ICMT) is proposed to realize broadband design for terahertz frequency multipliers. Based on the proposed design method, a 170‐ to 260‐GHz full‐band frequency doubler was designed, fabricated, and measured. The measured results show that the doubler achieves an output power of 4–7.5 mW in the entire frequency band under 140‐mW input power, corresponding to a conversion loss of 12.5–15.4 dB.