A 195 mW/152 mW Mobile Multimedia SoC With Fully Programmable 3-D Graphics and MPEG4/H.264/JPEG

An 8M Polygons/s 3-D Graphics SoC With Full Hardware Geometric and Rendering Engine for Mobile Applications

“…The performance index of the 3DG drawing speed/power consumption is used to compare the tradeoff between power consumption and performance. The 3DG accelerator improves the performance by 59% compared to the best work [5]. The work in [2] achieved 50 Mvertices/s, but it was only for the geometry performance.…”

“…The JSSCC06 and JSSCC08 were designed for 0.13-m CMOS technology. Even though these works have an advantage of a more advanced technology, the proposed SoC achieved a better performance and a lower power than these works [3], [5].…”

“…A high flexibility of 3DG requires a high performance processor with VLIW architecture or a SIMD instruction set [2]- [5], but a full hardware engine allows low power consumption because it has optimized function units for 3DG. We choose the fully hardware pipelined 3DG accelerator for low power consumption.…”

“…Programmable 3DG accelerators are used to increase flexibility by allowing different programs to be used on the chip. However, this results in very complex processor architectures [2]- [5], and these chips generally have high power consumption. The full hardware 3DG accelerators generally consume less power than programmable 3DG accelerators, but the power consumption is still high in spite of a hardware optimization [1], [6].…”

“…Recently, several hardware implementations of Gaussian variate generators have been proposed (see [5], [6], and their references). However, hardware implementations of other important distributions, such as the Rayleigh and Ricean distributions, have received far less attention [7], [8].…”