2017 IEEE Photonics Conference (IPC) 2017
DOI: 10.1109/ipcon.2017.8115991
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A 2.2-mW 24-Mb/s CMOS LiFi receiver system-on-a-chip with ambient light rejection and post-equalization

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Cited by 6 publications
(4 citation statements)
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“…A high reverse bias is added to raise the electric field and the velocity of the carriers responsible for the avalanche effect. Owing to the phenomenon of avalanches, APD shows great photo sensibility relative to a PIN PD, (iii) SPADs, (iv) CMOS sensors [159,[171][172][173] and (v) solar photovoltaic PV cells [156,161,174]. Several benefits and drawbacks of using a PV-based receiver are shown in Table 3.…”
Section: Downlink Receiver Dlrmentioning
confidence: 99%
“…A high reverse bias is added to raise the electric field and the velocity of the carriers responsible for the avalanche effect. Owing to the phenomenon of avalanches, APD shows great photo sensibility relative to a PIN PD, (iii) SPADs, (iv) CMOS sensors [159,[171][172][173] and (v) solar photovoltaic PV cells [156,161,174]. Several benefits and drawbacks of using a PV-based receiver are shown in Table 3.…”
Section: Downlink Receiver Dlrmentioning
confidence: 99%
“…The subsequent main amplifier further amplifies the received signal, which is then connected to the baseband unit through a digital buffer (BUF) for data recovery. On-chip LDOs are utilized to suppress supply noise effects on the sensitive input stages [5]. Implemented in a standard 0.18-µm CMOS process, the SoC provides a trans-impedance gain of 124 dBΩ within a -3-dB…”
Section: Vlc Receiver Socmentioning
confidence: 99%
“…The photograph of the receiver SoC is shown in Fig. 4 (b), which occupies a silicon area of 0.7×0.4 mm 2 [5].…”
Section: -3 / X Limentioning
confidence: 99%
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