A 2.3mW quadrature bandpass continuous-time ΔΣ modulator with reconfigurable quantizer

Saalfeld, Tobias; Atac, Aytac; Liao, Lei; Wunderlich, Ralf; Heinen, Stefan

doi:10.1109/prime.2016.7519526

Cited by 2 publications

(1 citation statement)

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“…After down conversion to the desired IF a complex valued quadrature bandpass filter is used for channel selection. Finally, the received signal is converted to the digital domain using a reconfigurable M as presented in Saalfeld et al (2016).…”

Section: System Overviewmentioning

confidence: 99%

A digital receiver signal strength detector for multi-standard low-IF receivers

et al. 2018

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Abstract. This paper presents a receiver signal strength detector based on a discrete Fourier transform implementation. The energy detection algorithm has been designed and measured using a custom multi-standard transceiver ASIC with a low-IF receiver at 0.5, 1 and 2 MHz IF. The proposed implementation directly processes the single bit ΔΣ modulator data and features a clear channel assessment for arbitrary modulation schemes without energy consuming demodulation. Continuous monitoring of the derivative of the RSSI takes advantage of faster coefficient convergence for higher power levels and reduces computation time. A dynamic range of 65 dB has been achieved in FPGA based measurements with a linearity error of less than 1.2 dB. Furthermore, synthesis results for an on-chip implementation for an 130 nm RF CMOS technology show an overall power consumption of 1.5 mW during calculation.

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Section: System Overviewmentioning

confidence: 99%