A 2.71‐pA/√Hz ultra‐low noise, 70‐dB dynamic range CMOS transimpedance amplifier with incorporated microstrip line techniques over extended bandwidth

Abstract

Recent advancements in the area of telemedicine have focused on remote patient monitoring services as a new frontier in medical applications. The present work reports a 65‐nm complementary metal–oxide–semiconductor (CMOS)‐based transimpedance amplifier (TIA) in an optical radar system for non‐contact patient monitoring. A T‐shaped microstrip line (MSL) integrated with variable gain common source TIA using MSL peaking technique and off‐chip post‐amplification integration is a newly proposed architecture to achieve a ultra‐low noise, high dynamic range (DR) and high figure of merit over broadband than a traditional TIAs. First, the integrated T‐shaped MSL develops an additional resonant frequency that resonates with a photodiode capacitance improving the bandwidth performance at higher Q values. Second, the shunt MSL peaking technique that introduces an additional conjugate pole‐pair that cancels the effect of input capacitance helps to further improve the bandwidth of the TIA. Finally, an active feedback concept achieves a wide linear dynamic range enabling high TIA detectability. The proposed TIA realizes an impedance bandwidth of 770 MHz ranging from 7.12 to 7.89 GHz with a transimpedance gain of 105.1 dBΩ and ultra‐low input‐referred noise (IRN) density of 2.71 pA/√Hz. A high linear DR of 70 dB is achieved by employing a variable gain control scheme with a low group delay variation of 0.81 ns. The proposed work demonstrates a 1‐Gb/s data rate while a bit‐error rate less than 10−12 is achieved. The TIA consumes a power of 0.82 mW under the supply voltage of 1.2 V.

An improved low‐input resistance folded‐cascode transimpedance amplifier for giga‐bit per second optical communication front‐ends

“…Along with the mentioned problems, the photodiode presents a rather large parasitic capacitance at the input node, significantly limiting the system's frequency bandwidth. By presenting a small input resistance, thus a small time constant, regulated cascode (RGC) structures [3][4][5][6] isolate this parasitic capacitance. However, such structures demand high voltage headroom for high data rates.…”

“…Another popular method to expand the frequency bandwidth in designing TIAs is to utilize passive inductors as a series/parallel inductive peaking approach. 6,7 Yet, a large area is required on the chip. To solve this problem, the active inductive peaking method was introduced in previous studies [7][8][9][10] to conserve the area on the chip, besides broadening the frequency bandwidth.…”

“…Another popular method to expand the frequency bandwidth in designing TIAs is to utilize passive inductors as a series/parallel inductive peaking approach 6,7 . Yet, a large area is required on the chip.…”