A 2&amp;#x00D7;2 MIMO 802.11 abgn/ac WLAN SoC with integrated T/R switch and on-chip PA delivering VHT80 256QAM 17.5dBm in 55nm CMOS

Chen, Tsung-Ming; Chan, Wei-Chia; Chen, Lin; Hsu, Jui-Lin; Li, Wenkai; Wu, Pi-An; Huang, Yanbin; Huang, Yina; Tsai, T. C.; Chang, P.; Chen, Chih-Lung; Tsai, Chih-Hou; Chang, Tsin‐Yuan; Huang, I-Ching; Chiu, Wen-Hsien; Liao, Chun-Hao; Wu, Chhi‐Chong; Chien, George

doi:10.1109/rfic.2014.6851704

Cited by 18 publications

(2 citation statements)

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“…Therefore, the PA that uses an 802.11n signal should operate more linearly than the PA that uses an 802.11g/a signal. Without applying predistortion, the performance of the implemented 802.11n CMOS PA was comparable to those re- ported in [5,10].…”

Section: Measurement Resultsmentioning

confidence: 79%

A Fully Integrated Dual-Band WLP CMOS Power Amplifier for 802.11n WLAN Applications

Baek¹,

Ahn²,

Ryu³

et al. 2017

Journal of electromagnetic engineering and science

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A fully integrated dual-band CMOS power amplifier (PA) is developed for 802.11n WLAN applications using wafer-level package (WLP) technology. This paper presents a detailed design for the optimal impedance of dual-band PA (2 GHz/5 GHz PA) output transformers with low loss, which is provided by using 2:2 and 2:1 output transformers for the 2 GHz PA and the 5 GHz PA, respectively. In addition, several design issues in the dual-band PA design using WLP technology are addressed, and a design method is proposed. All considerations for the design of dual-band WLP PA are fully reflected in the design procedure. The 2 GHz WLP CMOS PA produces a saturated power of 26.3 dBm with a peak power-added efficiency (PAE) of 32.9%. The 5 GHz WLP CMOS PA produces a saturated power of 24.7 dBm with a PAE of 22.2%. The PA is tested using an 802.11n signal, which satisfies the stringent error vector magnitude (EVM) and mask requirements. It achieved an EVM of -28 dB at an output power of 19.5 dBm with a PAE of 13.1% at 2.45 GHz and an EVM of -28 dB at an output power of 18.1 dBm with a PAE of 8.9% at 5.8 GHz.Key Words: CMOS, Integrated Circuit, Power Amplifier, Transformer, WLAN. This is an Open-Access article distributed under the terms of the Creative Commons Attribution Non-Commercial License (http://creativecommons.org/licenses/by-nc/3.0) which permits unrestricted non-commercial use, distribution, and reproduction in any medium, provided the original work is properly cited. ⓒ

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Section: Measurement Resultsmentioning

confidence: 79%

A Fully Integrated Dual-Band WLP CMOS Power Amplifier for 802.11n WLAN Applications

Baek¹,

Ahn²,

Ryu³

et al. 2017

Journal of electromagnetic engineering and science

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“…Wireless local area network (WLAN) technology has become increasingly popular in recent years, and has been integrated into various mobile devices such as computers, mobile phones, and tablets. Research on CMOS SOC that can be used in wireless local area network (WLAN) technology has been the focus of attention in recent years [1][2][3][4][5]. However, integrating power amplifiers (PAs) into WLAN systems has been a major bottleneck due to the low breakdown voltage and the lossy substrate in the CMOS process.…”

Section: Introductionmentioning

confidence: 99%

A Fully Integrated High Efficiency 2.4 GHz CMOS Power Amplifier with Mode Switching Scheme for WLAN Applications

Shen

Taishan²,

Wu³

2023

Applied Sciences

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A 3.3 V mode-switching RF CMOS power amplifier (PA) for WLAN applications is presented, which is integrated into a 55-nm bulk CMOS process. The proposed PA offers both static control and dynamic power control, allowing it to operate efficiently in both low-power and high-power modes. The pure low-power mode is achieved by reducing power cells, which are also used for linearization in high power mode. The low-power mode is achieved by reducing the number of power cells which are also used for linearization in the high-power mode. In the dynamic power control mode, the total AM–AM and AM–PM distortion is effectively compensated for by dynamically controlling the number of power cells and adjusting the matching input. The proposed PA achieves an output P1dB of 27.6 dBm with a PAE of 32.7% and an output P1dB of 17.7 dBm with a PAE of 10% in high-power and low-power modes, respectively. It is measured with an 802.11 n 64-quadrature-amplitude-modulation (MCS7) signal and shows a maximum average power of 19 dBm under an error-vector-magnitude (EVM) of −27 dB.

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A 5.2-GHz full-integrated RF front-end by T/R switch, LNA, and PA co-design with 3.2-dB NF and +25.9-dBm output power

Chen

Tsai

Chuo

et al. 2015

2015 IEEE Asian Solid-State Circuits Conference (A-Sscc)

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A 2×2 MIMO 802.11 abgn/ac WLAN SoC with integrated T/R switch and on-chip PA delivering VHT80 256QAM 17.5dBm in 55nm CMOS

Cited by 18 publications

References 1 publication

A Fully Integrated Dual-Band WLP CMOS Power Amplifier for 802.11n WLAN Applications

A Fully Integrated Dual-Band WLP CMOS Power Amplifier for 802.11n WLAN Applications

A Fully Integrated High Efficiency 2.4 GHz CMOS Power Amplifier with Mode Switching Scheme for WLAN Applications

A 5.2-GHz full-integrated RF front-end by T/R switch, LNA, and PA co-design with 3.2-dB NF and +25.9-dBm output power

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