A 2-D analytical threshold-voltage model for GeOI/GeON MOSFET with high-k gate dielectric

Te homogeneous precipitation in Ge dislocation loop vicinity

“…Because of Ge compatibility with the current Si-based complementary metal oxide semiconductor (CMOS) technology, and because of the successful development of high-k dielectrics in last generation microelectronic devices, the development of a Ge-based CMOS technology is seriously investigated. [1][2][3][4][5][6][7][8][9][10] However, Ge doping is one of the main difficulties preventing Ge CMOS technology to arise. 1,[11][12][13][14][15][16][17] In particular, usual n-type Si dopants (such as As and P) exhibit a larger diffusivity and a lower solubility in Ge, 1,[11][12][13][14]17 preventing the production of Ge devices as small as current Si devices (lateral size < 20 nm).…”