A 20 Gb/s triple-mode (PAM-2, PAM-4, and duobinary) transmitter

Min, Byungho; Lee, Keytaek; Palermo, Samuel

doi:10.1016/j.mejo.2012.05.009

Cited by 13 publications

(3 citation statements)

References 9 publications

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“…Traditionally, the clock-driven flip-flop is used to ensure the delay time, but it also has strict phase requirements. Its timing diagram is shown in Figure 4; data experience T XOR and T D−Q delays through the XOR gate and flip-flop, respectively, [21]. For the precoder to work properly, the two delays must contain an exact bit period T b , that is, T XOR + T D−Q = T b , where T XOR is the delay time after the XOR gate, T D−Q is the delay time after the flip-flop, and T b is an exact bit period.…”

Section: Precoding Designmentioning

confidence: 99%

A 112 Gb/s DAC-Based Duo-Binary PAM4 Transmitter in 28 nm CMOS

Tang

Shi

et al. 2022

Electronics

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To reduce the high bit error rate of serial transceivers under strong channel attenuation, a low-power 112 Gb/s SerDes transmitter was designed using a duo-binary PAM4 modulation technology. By adopting duo-binary PAM4 modulation technology, the problem of the low bandwidth utilization of a high-speed PAM4 (pulse amplitude modulation 4) signal was improved. The problem of high jitter caused by charge sharing and the limited bandwidth of a 4:1 high-speed MUX was improved by using precharging auxiliary transistors. The system power consumption of the transmitter was reduced by using a 7-bit weighted voltage-driven digital-to-analog converter (DAC). The transmitter was designed with a 28 nm CMOS process and powered by a voltage of 0.9 V. The simulation results showed that when the channel attenuation was 20.9 dB, the transmitter could work at 112 Gb/s, the power consumption was 2.02 pJ/bit, and the linearity was 96.7%.

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Section: Precoding Designmentioning

confidence: 99%

A 112 Gb/s DAC-Based Duo-Binary PAM4 Transmitter in 28 nm CMOS

Tang

Shi

et al. 2022

Electronics

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“…Hence, for a bit rate of f b , the Nyquist frequency for NRZ is β 0 = f b 2 , whereas that for the 4-PAM is β 1 = f b 4 . To evaluate each code considering the amount of information, the effective Nyquist rate is used for comparison as in [4], [5]. Since the channel exhibits a low-pass filter behavior, it attenuates the β 0 = f b 2 component more than the…”

Section: Comparison Of Nrz and 4-pam Signalingmentioning

confidence: 99%

Comparison of NRZ and 4-PAM Coding for High-Speed VLSI Data Transmission

Yuminaka

Takada

2015

KEM

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As the Required Data Rate for VLSI System Communication Increases, Channel Bandwidthlimitation Becomes a Crucial Problem as High-Frequency Channel Loss Degrades the Transmission Performance.In this Paper, we Compare Non-Return-to-Zero (NRZ) Binary and 4-PAM (pulse Amplitudemodulation) Coding Techniques for High-Speed Data Transmission by Fabricating a Test Board of a Microstripline. by Extracting the Micro-Strip Line Parameters, we Carry out Co-Simulations to Evaluate Spectrallyefficient Coding for High-Speed Data Transmission.We Consider the Conditions for which 4-Pamsignaling Provides an Advantage over NRZ Signaling from the Viewpoint of Channel Profiles.

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“…Therefore, it is expected that higher-order PAM methods such as PAM-8 and PAM-16 are needed for next-generation wireline communication systems [11]. However, as observed in the PAM-4 transceiver systems, multilevel signaling schemes suffer from a low signal-to-noise ratio because of the reduced signal levels [12,13] as the maximum signal power is constrained, regardless of the signaling method. To make matters worse, the impact of intersymbol interference (ISI) on signal integrity is much higher in multilevel signaling than in conventional NRZ systems.…”

Section: Introductionmentioning

confidence: 99%

Transition‐limited pulse‐amplitude modulation technique for high‐speed wireline communication systems

2022

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This paper presents a transition‐limited pulse‐amplitude modulation (TLPAM) signaling method to enable a high data rate and robust wireline communications. TLPAM signaling addresses the impact of high intersymbol interference (ISI) ratios in conventional M‐ary PAM signaling methods by limiting the maximum voltage transition level between adjacent symbols. The implementation of a TLPAM signaling encoder is realized by setting back the most significant bits (MSBs) in the queue. The correlation between TLPAM's maximum transition level, effective data rate, and eye width/height is analyzed with various channel loss parameters, followed by characterization and measurement results with a realistic channel setup. The analysis and experimental results reveal the effectiveness of the proposed TLPAM signaling scheme for achieving a high data rate with minimal interference.

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A 20 Gb/s triple-mode (PAM-2, PAM-4, and duobinary) transmitter

Cited by 13 publications

References 9 publications

A 112 Gb/s DAC-Based Duo-Binary PAM4 Transmitter in 28 nm CMOS

A 112 Gb/s DAC-Based Duo-Binary PAM4 Transmitter in 28 nm CMOS

Comparison of NRZ and 4-PAM Coding for High-Speed VLSI Data Transmission

Transition‐limited pulse‐amplitude modulation technique for high‐speed wireline communication systems

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