2021
DOI: 10.1109/jssc.2021.3091546
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A 200-GHz Power Amplifier With a Wideband Balanced Slot Power Combiner and 9.4-dBm P sat in 65-nm CMOS: Embedded Power Amplification

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Cited by 17 publications
(4 citation statements)
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“…This work Bameri and Momeni 23 Bameri and Momeni 31 Sarmah et al 32 Eissa and Kissinger elements to achieve the upper limit of G ma has been derived. Finally, to verify the analytic assessment of the proposed gain-boosting structure, a three-stage amplifier has been designed in a 130 nm SiGe technology with a power gain of 21.1 dB at 230 GHz.…”
Section: Refmentioning
confidence: 99%
“…This work Bameri and Momeni 23 Bameri and Momeni 31 Sarmah et al 32 Eissa and Kissinger elements to achieve the upper limit of G ma has been derived. Finally, to verify the analytic assessment of the proposed gain-boosting structure, a three-stage amplifier has been designed in a 130 nm SiGe technology with a power gain of 21.1 dB at 230 GHz.…”
Section: Refmentioning
confidence: 99%
“…Typical peak efficiency of more than 40% can be reached in a CMOS process, whereas the efficiency of a frequency multiplier is reported to be 18% at the 300 GHz range, which results in an overall efficiency of 4% at sub‐THz regions in the 200–300 GHz band [ 14 ] . In comparison, the efficiency of the sub‐THz power amplifier degenerates drastically when the frequency approaches the fmax of the process, and can be as low as 1% at 200 GHz [ 15 ] . The frequency multiplication is commonly extracted from the non‐linearity of devices, which includes the nonlinear capacitances between the gates and the sources of transistors, the non‐linearity due to current clipping at the sources of transistors, the non‐linearity of the output impedances, and the non‐linearity of the current and voltage waveforms.…”
Section: Thz Power Generationmentioning
confidence: 99%
“…, higher efficiency can sometimes be extracted from frequency multipliers rather than direct power amplification. Typical peak efficiency of more than 40% can be reached in a CMOS process, whereas the efficiency of a frequency multiplier is reported to be 18% at the 300 GHz range, which results in an overall efficiency of 4% at sub-THz regions in the 200-300 GHz band [14] . In comparison, the efficiency of the sub-THz power amplifier degenerates drastically when the frequency approaches the of the process, and can be as low as 1% at 200 GHz [15] .…”
Section: Even Belowmentioning
confidence: 99%
“…Bulk or SOI CMOS processes have limited f T /f max as well as low supply voltage. In [6], [7], output power and PAE of CMOS PAs are below 10-dBm and 8%. PA designs in SiGe HBT processes have shown decent power gain with multi-stage design and high output power with power combining at lower G-band range [8], [9] but the efficiency is limited to single digits above 200 GHz [10], [11].…”
Section: Introductionmentioning
confidence: 99%