A 200-MSample/s trellis-coded PRML read/write channel with analog adaptive equalizer and digital servo

Alini, R.; Betti, G.; Bietti, I.; Bollati, G.; Brianti, F.; Dati, A.; Demicheli, M.; Gadducci, P.; Marchese, S.; Marconetti, E.; Pisati, V.; Zuffada, M.; Castello, R.; Heydari, F.; Gillen, P.; Maguire, Gerald Q.; Marrow, M.; McDonagh, S.; O’Brien, Fiona; O'Brien, J.; O'hEarcain, N.; Reddy, D.; Fredrickson, L.; Stone, D.; Volz, Lennart

doi:10.1109/4.641707

Cited by 19 publications

(4 citation statements)

References 24 publications

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“…Clearly, so that if and only if (6) We recall that and . Condition (6) may be recast in terms of and as (7) It can be observed that only the ratio of and comes into play.…”

Section: The Corresponding Open-loop Transfer Function Ismentioning

confidence: 99%

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Effect of loop delay on phase margin of first-order and second-order control loops

Bergmans

2005

IEEE Trans. Circuits Syst. II

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Link to publication Citation for published version (APA):Bergmans, J. W. M. (2005). Effect of loop delay on phase margin of first-order and second-order control loops. IEEE Transactions on Circuits and Systems. II, Analog and Digital Signal Processing, 52(10), 621-625. DOI: 10.1109/TCSII.2005 General rights Copyright and moral rights for the publications made accessible in the public portal are retained by the authors and/or other copyright owners and it is a condition of accessing publications that users recognise and abide by the legal requirements associated with these rights.• Users may download and print one copy of any publication from the public portal for the purpose of private study or research.• You may not further distribute the material or use it for any profit-making activity or commercial gain • You may freely distribute the URL identifying the publication in the public portal ? Take down policyIf you believe that this document breaches copyright please contact us providing details, and we will remove access to the work immediately and investigate your claim. Abstract-This paper analyzes the phase margin of first-order and second-order control loops in the presence of a loop delay and establishes rules of thumb on the maximum permissible delay for a given phase margin. Both discrete-time and continuous-time loops are considered. Results are applicable, for example, to adaptive filters and to first-order and second-order phase-locked loops.Index Terms-Adaptive filter, control loop, loop delay, phase margin, phase-locked loop (PLL).

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“…Clearly, so that if and only if (6) We recall that and . Condition (6) may be recast in terms of and as (7) It can be observed that only the ratio of and comes into play.…”

Section: The Corresponding Open-loop Transfer Function Ismentioning

confidence: 99%

“…Especially during acquisition, the compound loop delay can become prohibitively large. A typical approach to mitigate this problem involves the use of auxiliary detectors that produce tentative decisions with minimum delay [5], [6].…”

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confidence: 99%

Effect of loop delay on phase margin of first-order and second-order control loops

Bergmans

2005

IEEE Trans. Circuits Syst. II

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“…Continuous-time transversal equalizers have been explored for high-speed applications, using charge-coupled devices (CCDs) [19] and surface accoustic wave (SAW) filters [20], as well as switch capacitors [21] and -ladder filters [22], [23]. Besides speed, such analog equalization has an additional advantage: Since sampling is done after equalization, signal delay in the equalizer does not affect the performance and stability of the clock-and-data-recovery (CDR) timing loop [24].…”

Section: A Transversal Equalizermentioning

confidence: 99%

Integrated transversal equalizers in high-speed fiber-optic systems

Tierno

Pepeljugoski

et al. 2003

IEEE J. Solid-State Circuits

125

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Abstract-Intersymbol interference (ISI) caused by intermodal dispersion in multimode fibers is the major limiting factor in the achievable data rate or transmission distance in high-speed multimode fiber-optic links for local area networks applications. Compared with optical-domain and other electrical-domain dispersion compensation methods, equalization with transversal filters based on distributed circuit techniques presents a cost-effective and lowpower solution. The design of integrated distributed transversal equalizers is described in detail with focus on delay lines and gain stages. This seven-tap distributed transversal equalizer prototype has been implemented in a commercial 0.18-m SiGe BiCMOS process for 10-Gb/s multimode fiber-optic links. A seven-tap distributed transversal equalizer reduces the ISI of a 10-Gb/s signal after 800 m of 50-m multimode fiber from 5 to 1.38 dB, and improves the bit-error rate from about 10 5 to less than 10 12 .

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“…Delay cells implemented in tapped-delay-lines for FFE can consist of passive elements, active elements, or a combination of the two. Passive delay cells are implemented as transmission lines [12], or more commonly as lumped LC ladders (artificial transmission lines) [ [17], Active delay cells have been implemented as a current-mode two-integrator-loop biquad [18], an inverter-based delay with activeinductor [19], a modified Cherry-Hooper architecture [20], a two-pole Butterworth filter [21], and as cascaded emitter followers [22]. A combination of active and passive (defined as containing transistors and inductors) is presented in [23] as a lumped LC ladder delay followed by an active buffer.…”

Section: Another Desirable Property Of Fir Delay Cells Is To Have No mentioning

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A delay cell for 40 Gb/s FFE

Lovitt¹

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A 200-MSample/s trellis-coded PRML read/write channel with analog adaptive equalizer and digital servo

Cited by 19 publications

References 24 publications

Effect of loop delay on phase margin of first-order and second-order control loops

Effect of loop delay on phase margin of first-order and second-order control loops

Integrated transversal equalizers in high-speed fiber-optic systems

A delay cell for 40 Gb/s FFE

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