A 201.4 GOPS 496 mW Real-Time Multi-Object Recognition Processor With Bio-Inspired Neural Perception Engine

Kim, Joo-Young; Kim, Minsu; Lee, Seungjin; Oh, Jinwook; Kim, Kwanho; Yoo, Hoi‐Jun

doi:10.1109/jssc.2009.2031768

Cited by 102 publications

(52 citation statements)

References 12 publications

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“…Compared to previous works employing visual attention in object recognition [6], [7], the UVAM adds a top-down attention feedback loop to improve attention precision. Visual attention based on bottom-up saliency cannot distinguish salient backgrounds from salient objects and thus performs poorly when the background contains salient points.…”

Section: B Unified Visual Attention Modelmentioning

confidence: 99%

“…The proposed chip reuses several features from previous generations of object recognition chip research at our group [5]- [7]. The host RISC processor is completely reused from [7] with some modifications to the cache for reduced latency.…”

Section: Chip Architecturementioning

confidence: 99%

“…Object recognition can be accelerated by integrating a large number of processing elements that operate on the image in parallel [3]- [7]. General purpose multi-core processors such as the Stream Processor [3] are very flexible but consume high power.…”

mentioning

confidence: 99%

“…Real-time object recognition is achieved on 320 240 pixel images in [6] by dividing the input image into 8 columns which are each processed in parallel by 8 8-way SIMD processors. Reference [7] achieves 30 fps performance on 640 480 images by doubling the SIMD processor count to 16, and employing a tile-based approach.…”

mentioning

confidence: 99%

“…In [6], saliency-based visual attention [8] was accelerated by a visual attention engine (VAE) [9] to select regions that contain conspicuous points in the image. The region selection was improved in [7] with the help of a neuro-fuzzy hardware accelerated region growing scheme [10]. The limitation of saliency-based visual attention is that it relies only on feed-forward bottom-up features to select object regions under the assumption that objects are more salient than the background.…”

mentioning

confidence: 99%

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A 345mW heterogeneous many-core processor with an intelligent inference engine for robust object recognition

Lee

Kim

et al. 2010

2010 IEEE International Solid-State Circuits Conference - (ISSCC)

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Abstract-A heterogeneous many-core object recognition processor is proposed to realize robust and efficient object recognition on real-time video of cluttered scenes. Unlike previous approaches that simply aimed for high GOPS/W, we aim to achieve high Effective GOPS/W, or EGOPS/W, which only counts operations carried out on meaningful regions of an input image. This is achieved by the Unified Visual Attention Model (UVAM) which confines complex Scale Invariant Feature Transform (SIFT) feature extraction to meaningful object regions while rejecting meaningless background regions. The Intelligent Inference Engine (IIE), a mixed-mode neuro-fuzzy inference system, performs the top-down familiarity attention of the UVAM which guides attention toward pre-learned objects. Weight perturbation-based learning of the IIE ensures high attention precision through online adaptation. The SIFT recognition is accelerated by an optimized array of 4 20-way SIMD Vector Processing Elements, 32 MIMD Scalar Processing Elements, and 1 Feature Matching Processor. When processing 30 fps 640 480 video, the 50 mm 2 object recognition processor implemented in a 0.13 m process achieves 246 EGOPS/W, which is 46% higher than the previous work. The average power consumption is only 345 mW.

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Section: B Unified Visual Attention Modelmentioning

confidence: 99%