A 23mW fully integrated GPS receiver with robust interferer rejection in 65nm CMOS

Moon, Hee-Sung; Lee, Sangyoub; Heo, Sung; Yu, Hwayeal; Yu, Jinhyunck; Chang, Jun Keun; Choi, Sooseok; Park, Byeong-Ha

doi:10.1109/isscc.2010.5434047

Cited by 26 publications

(12 citation statements)

References 1 publication

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“…The AGC loop sets the gain of the LNA and the PGA so the duty cycle of the MSB MAG bit of the ADC is about 33% or 18.85% for the 2-or 4-bit ADC, respectively, to provide negligible SNR loss of less than 0.5 dB [11], [29]. A digitally assisted DCOC is used to avoid saturation of the PGA and improve the second-order linearity related to dc offset in this transceiver, which is similar to [34]. In addition, the last residual output offset is less than 1 mV.…”

Section: Agc Loopmentioning

confidence: 99%

Reconfigurable All-Band RF CMOS Transceiver for GPS/GLONASS/Galileo/Beidou With Digitally Assisted Calibration

et al. 2015

IEEE Trans. VLSI Syst.

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This paper presents a fully integrated reconfigurable all-band RF transceiver for GPS/GLONASS/ Galileo/Beidou in 55-nm CMOS. The transceiver incorporates three low-IF receivers (RXs) and one direct up-conversion BPSK transmitter (TX), which can be configured to receive any two global navigation satellite system (GNSS) signals or switched to process the Chinese Beidou(I) signals. A switching module is integrated to provide the connectivity between different RF front-end and IF channel (IFC), which will effectively simplify the design complexity of the IFC and save power consumption, while the GNSS signals are received. A flexible frequency plan with two frequency synthesizers is utilized to satisfy different local oscillator requirements of the transceiver. An optimized automatic frequency calibration scheme using an error compensation logic enables fast and high-precision calibration process for optimum phase-locked loop operation. Several digitally assisted calibration modules are integrated to ensure that the chip performance only shows a weak process, voltage and temperature (PVT) dependence. While drawing about 21.5-30.2 mA per RX channel from a 1.2-V supply, the RXs achieve an image rejection ratio more than 49 dB after I/Q mismatch calibration, an automatic gain control range of 88 dB, and an input-referred 1 dB compression point of better than −25 dBm with a minimum noise figure of about 2 dB. The output power of the TX is about 5 dBm with about 6% error vector magnitude (EVM) and 30-mA current from a 1.2-V supply. The whole transceiver consumes a die area of 2.8 × 3 mm 2 .

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Section: Agc Loopmentioning

confidence: 99%

Reconfigurable All-Band RF CMOS Transceiver for GPS/GLONASS/Galileo/Beidou With Digitally Assisted Calibration

et al. 2015

IEEE Trans. VLSI Syst.

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“…The received signal strength can be quite small, setting the demands for low noise¯gure (NF) and reasonable high gain compared to GSM and WCDMA modes. [7][8][9] System level designs of some fundamental speci¯cations must be¯rstly proceeded to acquire excellent performance for a GPS receiver.…”

Section: System Level Designsmentioning

confidence: 99%

A 2.9 mm² Highly Integrated Low Noise GPS Receiver in 0.18-μm CMOS Technology

Zhang

Huang

2015

J CIRCUIT SYST COMP

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An L1 band highly integrated low noise GPS receiver in 0.18-m CMOS is presented in this paper. The receiver adopts double conversion structure and two dynamic range control modes of variable gain ampli¯er (VGA) and programmable gain ampli¯er (PGA). The receiver includes the blocks of LNA, down-conversion mixers, band pass¯lter, received signal strength indicator (RSSI), VGA, PGA, 2-bit ADC, two frequency synthesizers and so on. The LNA adopts source inductive degeneration technique to achieve good noise performance, and a novel positive feedback capacitor is introduced to enhance gain. The novel gain-boosting charge pump (CP) structure acquires accurate current matching of 0.1% error which improves the output phase noise of frequency synthesizer. The measured radio performances of noise¯gure (NF) is only 4 dB and the maximum gain is 110 dB. The gain control range achieves 50 dB provided by PGA and VGA. The receiver occupies an area of 1:875 mm Â 1:575 mm including all needed voltage reference and the 1.8 V low dropout regulator.

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“…Location-based services (LBS) utilizing GNSS positioning have become a part of everyday life. Nowadays, the LBS consumer market is dominated by single-frequency GPS (US global positioning system) C/A (coarse acquisition signal) only and low-cost, highly integrated GNSS receivers [3][4][5][6][7][8][9]. However, low precision and low reliability are their main limitations.…”

Section: Introductionmentioning

confidence: 99%

GNSS-ISE: Instruction Set Extension for GNSS Baseband Processing

Marcinek

Pleskacz

2020

Sensors

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This work presents the results of research toward designing an instruction set extension dedicated to Global Navigation Satellite System (GNSS) baseband processing. The paper describes the state-of-the-art techniques of GNSS receiver implementation. Their advantages and disadvantages are discussed. Against this background, a new versatile instruction set extension for GNSS baseband processing is presented. The authors introduce improved mechanisms for instruction set generation focused on multi-channel processing. The analytical approach used by the authors leads to the introduction of a GNSS-instruction set extension (ISE) for GNSS baseband processing. The developed GNSS-ISE is simulated extensively using PC software and field-programmable gate array (FPGA) emulation. Finally, the developed GNSS-ISE is incorporated into the first-in-the-world, according to the authors’ best knowledge, integrated, multi-frequency, and multi-constellation microcontroller with embedded flash memory. Additionally, this microcontroller may serve as an application processor, which is a unique feature. The presented results show the feasibility of implementing the GNSS-ISE into an embedded microprocessor system and its capability of performing baseband processing. The developed GNSS-ISE can be implemented in a wide range of applications including smart IoT (internet of things) devices or remote sensors, fostering the adaptation of multi-frequency and multi-constellation GNSS receivers to the low-cost consumer mass-market.

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A 23mW fully integrated GPS receiver with robust interferer rejection in 65nm CMOS

Cited by 26 publications

References 1 publication

Reconfigurable All-Band RF CMOS Transceiver for GPS/GLONASS/Galileo/Beidou With Digitally Assisted Calibration

Reconfigurable All-Band RF CMOS Transceiver for GPS/GLONASS/Galileo/Beidou With Digitally Assisted Calibration

A 2.9 mm² Highly Integrated Low Noise GPS Receiver in 0.18-μm CMOS Technology

GNSS-ISE: Instruction Set Extension for GNSS Baseband Processing

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A 23mW fully integrated GPS receiver with robust interferer rejection in 65nm CMOS

Cited by 26 publications

References 1 publication

Reconfigurable All-Band RF CMOS Transceiver for GPS/GLONASS/Galileo/Beidou With Digitally Assisted Calibration

Reconfigurable All-Band RF CMOS Transceiver for GPS/GLONASS/Galileo/Beidou With Digitally Assisted Calibration

A 2.9 mm2 Highly Integrated Low Noise GPS Receiver in 0.18-μm CMOS Technology

GNSS-ISE: Instruction Set Extension for GNSS Baseband Processing

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A 2.9 mm² Highly Integrated Low Noise GPS Receiver in 0.18-μm CMOS Technology