A 250 mV, 352 &amp;#x00B5;W low-IF quadrature GPS receiver in 130 nm CMOS

Heiberg, Adam C.; Brown, Thomas W.; Mayaram, K.; Fiez, T.S.

doi:10.1109/vlsic.2010.5560322

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2012

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“…Sub-0.5V RF receiver circuits [1][2][3][4] have been reported. V DD is 0.5V in [1][2][3] and 0.25V in [4]. A sub-0.5V FBAR oscillator using a forwardbiasing bulk has been reported [5].…”

Section: Introductionmentioning

confidence: 99%

0.35V, 4.1μW, 39MHz crystal oscillator in 40nm CMOS

Saito

Yang

Watanabe

et al. 2012

Proceedings of the 2012 ACM/IEEE International Symposium on Low Power Electronics and Design

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A design methodology for sub-0.5V crystal oscillators is shown to realize an all-sub-0.5V ultra low power RF transceiver for wireless sensor networks. To reduce the minimum operating voltage (V DDmin ) of the crystal oscillator, both the optimization of the gate width of the CMOS inverter in the crystal oscillator and the reduction in gate length by CMOS technology scaling are required. In accordance with the developed design methodology, a 39MHz crystal oscillator is designed and fabricated in a 40nm CMOS. The measured power consumption is 4.1W at 0.35V and 39MHz, and the power supply voltage is the lowest among the previously reported crystal oscillators.

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“…Sub-0.5V RF receiver circuits [1][2][3][4] have been reported. V DD is 0.5V in [1][2][3] and 0.25V in [4]. A sub-0.5V FBAR oscillator using a forwardbiasing bulk has been reported [5].…”

Section: Introductionmentioning

confidence: 99%