A 28-W, −102.2-dB THD+N Class-D Amplifier Using a Hybrid ΔΣM-PWM Scheme

IEEE J. Solid-State Circuits

Rozsa

Berkhout³

et al. 2022

Self Cite

The power supply rejection ratio (PSRR) of conventional differential closed-loop Class-D amplifiers is limited by the feedback and input resistor mismatch and finite CMRR of the OTA in the 1 st integrator. This paper presents a 14.4 V Class-D amplifier employing chopping to tackle the mismatch, thereby improving the PSRR. However, chopping-induced intermodulation within a PWM-based class-D amplifier can severely degrade PSRR and linearity. Techniques to mitigate such intermodulation are proposed and analyzed. To chop the 14.4V PWM output signal, a high-voltage (HV) chopper employing DMOS transistors is developed. Its timing is carefully aligned with that of the low-voltage (LV) choppers to avoid further linearity degradation. The prototype, fabricated in a 180 nm BCD process, achieves a PSRR of >110 dB at low frequencies, which remains above 79 dB up to 20 kHz. It achieves a THD of −109.1 dB and can deliver a maximum of 14 W into an 8-Ω load with 93% efficiency while occupying a silicon area of 5 mm 2 . Index Terms-Audio power amplifier, class-D amplifier, intermodulation, power supply rejection ratio (PSRR), total harmonic distortion (THD).C Fig. 1. Conventional closed-loop Class-D amplifier in a BTL configuration and sources of limited PSRR: feedback resistor mismatch, input resistor mismatch, and finite CMRR of the OTA in the 1 st integrator.

Section: A Overviewmentioning

confidence: 99%

“…A fully differential 3 rd order loop filter based on active RC integrators is employed (Fig. 2) for high loop gain [13,25], with 𝑓𝑓 𝑈𝑈 = 570 kHz. The 1 st stage of A 1 is chopped to boost its CMRR and eliminate its 1/f noise.…”

Section: A Overviewmentioning

confidence: 99%

A Chopper Class-D Amplifier for PSRR Improvement Over the Entire Audio Band

IEEE J. Solid-State Circuits

Rozsa

Berkhout³

et al. 2022

Self Cite

“…The charge pump, shown in Fig. 4b, consists of 2 Schottky diodes (D1 and D2), an on-chip capacitor CCP, and reuses two off-chip bootstrap capacitors Cbst1 and Cbst2 that are already required in the floating gate driver circuits of the power transistors [5]. CCP is charged by Cbst1 and Cbst2 in an alternating fashion in each PWM cycle, holding VCP up to ~28 V. The level shifter is shown in Fig.…”

Section: A High-voltage Choppermentioning

confidence: 99%

“…A PWM modulator driven by an on-chip oscillator runs at 2.1 MHz, which allows a relatively high loop gain for high linearity. A 3 rd order loop filter [5,7] is employed, which provides >80 dB loop gain within the audio band to suppress the distortion of the output power stage. The input stage of the 1 st integrator's OTA is sized such that its 1/f noise corner frequency is below fCHOP.…”

Section: LV Circuitrymentioning

confidence: 99%

See 1 more Smart Citation

A -109.1 dB/-98 dB THD/THD+N Chopper Class-D Amplifier with >83.7 dB PSRR Over the Entire Audio Band

ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC)

Rozsa

Berkhout³

et al. 2021

Self Cite

This paper reports a chopper Class-D audio amplifier that obtains high PSRR over the entire audio band. A chopping scheme is proposed to minimize intermodulation distortion between pulse-width modulation (PWM) and chopping in the audio band. A high-voltage chopper is developed to handle a 14.4 V PWM signal. Timing matching techniques are proposed to minimize chopping nonidealities which ensure good PSRR and THD. Fabricated in a 180nm BCD process, the prototype obtains a PSRR >109 dB at 217 Hz and >83.7 dB over the entire audio band. It also achieves −109.1 dB/−98 dB THD/THD+N and can deliver a maximum of 13 W to an 8-Ω load.

A 155W −95.6 dB THD+N GaN-based Class-D Audio Amplifier With LC Filter Nonlinearity Compensation

Chen

2023 IEEE Applied Power Electronics Conference and Exposition (APEC)

Fan

2023

Self Cite

Silicon MOSFETs-based medium-power (< 50W) Class-D amplifiers (CDAs) switching in the MHz range have gained popularity in recent years, which achieves better linearity thanks to a higher loop gain in the audio band while enabling the use of LC filters with higher cut-off frequencies. However, for high-power (>100 W) CDAs, such switching frequency and high load current could lead to significant power loss. Furthermore, in the presence of a large current and voltage applied to the load, the linearity of the system can quickly degrade due to LC filter component voltage/current dependency. Without any LC filter nonlinearity compensation technique, LC components with high voltage/current rating must be used to reach high system linearity, which are often expensive and bulky. This paper presents a CDA using a GaN-based output stage to achieve high switching frequency and good efficiency simultaneously, and an integrated controller implemented in a 180nm CMOS technology to compensate for the LC filter nonlinearity. Switching at 1.8 MHz, the CDA can deliver a maximum of 155W from a 50V supply into a 4Ω load with a peak efficiency of 91.7%. It achieves a peak THD+N of -95.6 dB (0.0017%) while allowing the use of cheaper and smaller nonlinear LC components.