A 3–5 GHz Current-Reuse $g_{m}$-Boosted CG LNA for Ultrawideband in 130 nm CMOS

Khurram, Muhammad; Hasan, S. M. Rezaul

doi:10.1109/tvlsi.2011.2106229

Cited by 75 publications

(29 citation statements)

References 35 publications

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“…For this purpose, the gain TF must has two couple of complex conjugate poles. Nevertheless, the TF in (10) has only one complex conjugate pole. Therefore, the single conjugate pole must be placed between f 3dB,L and f 3dB,H .…”

Section: B the Proposed New Pole-zero Methodsmentioning

confidence: 99%

A new pole-zero technique for reducing thermal noise to design a very low noise figure UWB LNA

Sahoolizadeh

Jannesari

Dousti

2014

2014 22nd Iranian Conference on Electrical Engineering (ICEE)

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In this paper, a new pole-zero technique for reducing thermal noise is represented. In the proposed new pole-zero method, by extracting the noise and voltage-gain equations of the amplifier, the zeros of the noise transfer function (TF) are managed, so that they are placed near the poles of the gain TF. Therefore, significant noise reduction is achieved in the condition of maximizing the small-signal gain. The proposed pole-zero management technique is investigated by designing a 4 to 9 GHz ultra-wide-band (UWB) low-noise-amplifier (LNA). The linearity and power consumption could also be taken into consideration as additional design criteria. The proposed UWB LNA benefited from complete input/output matching, average power gain of 13.5 dB, and average noise figure of 1.4 dB. Also, 1-dB compression point and IIP3 are -8.8 dBm and +9.2 dBm, respectively at 6.5 GHz. With 130 nm CMOS technology, the circuit consumes 20 mW from supply voltage of 1.2 V. The area of the chip with pads is 0.145 µm 2 .Keywords-low noise amplifier (LNA); pole-zero management method; noise cancellation; ultra-wide-band (UWB).

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Section: B the Proposed New Pole-zero Methodsmentioning

confidence: 99%

A new pole-zero technique for reducing thermal noise to design a very low noise figure UWB LNA

Sahoolizadeh

Jannesari

Dousti

2014

2014 22nd Iranian Conference on Electrical Engineering (ICEE)

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“…The circuit incorporates a current reuse technique [14] to effectively distribute the operating current and prevent it from sinking to the ground. This leads to improved power performance and overall gain flatness.…”

Section: Proposed Lnamentioning

confidence: 99%

A 1.7 2.5 GHz Active Inductor based Low Power Low Noise Amplifier for Multi Standard Applications

Vaithianathan¹,

Raja²,

Srinivasan³

2012

IJCA

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Due to an increasing demand for simultaneous global roaming and all-in-one wireless phones, the interest in the development of the multi-standard transceivers has been increased. In the receiver front end, the performance of Low Noise Amplifier (LNA) decides overall receiver sensitivity and hence its design plays a crucial role. In this paper, an active inductor based tunable two-stage LNA employing current reuse technique is proposed for multistandard applications. The LNA is aimed at supporting CDMA-2000, GSM, WCDMA, WiMAX, Bluetooth and UMTS-TDD in the bandwidth range of 1.7 -2.5 GHz. The proposed LNA achieved a power gain of greater than 13 dB, noise figure less than 2 dB and impedance matching less than -8 dB for all the standards. The stability factor is maintained above 1, ensuring stable operation of the LNA without oscillations. The LNA consumes very low power of 7.96 mW at an operating voltage of 1V. The performance analysis of the proposed active inductor based tunable LNA is carried out using Agilent"s ADS simulator employing 90 nm CMOS technology. General TermsRF Circuit Design, Full Custom VLSI Design

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“…The frequency band of Ultra Wideband technology is between 3.1 GHz and 10.6 GHz for use in the indoor wireless applications. Many papers discussed about the design of LNAs [3][4][5]. To increase the performance and impedance matching of LNA, on-chip inductors are used.…”

Section: Introductionmentioning

confidence: 99%

Design of Low Power UWB CMOS Low Noise Amplifier using Active Inductor for WLAN Receiver

Manjula¹,

Malleshwari²,

Suganthy³

2018

IJET

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This paper presents a low power Low Noise Amplifier (LNA) using 0.18µm CMOS technology for ultra wide band (UWB) applications. gm boosting common gate (CG) LNA is designed to improve the noise performance. For the reduction of on chip area, active inductor is employed at the input side of the designed LNA for input impedance matching. The proposed UWB LNA is designed using Advanced Design System (ADS) at UWB frequency of 3.1-10.6 GHz. Simulation results show that the gain of 10.74+ 0.01 dB, noise figure is 4.855 dB, input return loss <-13 dB and 12.5 mW power consumption.

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A 3–5 GHz Current-Reuse $g_{m}$-Boosted CG LNA for Ultrawideband in 130 nm CMOS

Cited by 75 publications

References 35 publications

A new pole-zero technique for reducing thermal noise to design a very low noise figure UWB LNA

A new pole-zero technique for reducing thermal noise to design a very low noise figure UWB LNA

A 1.7 2.5 GHz Active Inductor based Low Power Low Noise Amplifier for Multi Standard Applications

Design of Low Power UWB CMOS Low Noise Amplifier using Active Inductor for WLAN Receiver

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