A 32-bit PowerPC system-on-a-chip with support for dynamic voltage scaling and dynamic frequency scaling

Nowka, K.; Carpenter, G.; MacDonald, Eric; Ngo, H.C.; Brock, Bishop; Ishii, Keiji; Nguyen, Thien Huu; Burns, J.L.

doi:10.1109/jssc.2002.803941

Cited by 181 publications

(68 citation statements)

References 9 publications

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“…Many power reduction schemes have been developed, and have been implemented as highly integrated systemon-a-chip (SoC) devices [1]. The research in this paper is to create a power management system that can be added on to existing microcontrollers that have no built-in power management support.…”

Section: Introductionmentioning

confidence: 99%

A Dynamic Frequency Controlling Technique for Power Management in Existing Commercial Microcontrollers

Lueangvilai¹,

Robertson²,

Martinez

2012

Journal of Computing Science and Engineering

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Power continues to be a driving force in central processing units (CPU) design. Most of the advanced breakthroughs in power have been in a realm that is applicable to workstation CPUs. Advanced power management systems will manage temperature, dynamic voltage scaling and dynamic frequency scaling in a CPU. The use of power management systems for microcontrollers and embedded CPUs has been modest, and mostly focuses on very large scale integration (VLSI) level optimizations compared to system level optimizations. In this paper, a dynamic frequency controlling (DFC) technique is introduced, to lay the foundation of a system level power management system for commercial microcontrollers. The DFC technique allows a commercial microcontroller to have minor modifications on both the hardware and software side, to allow the clock frequency to change to save power; results in this study show a 10% savings. By adding an additional layer of software abstraction at the interrupt level, the microcontroller can operate without having knowledge of the current clock frequency, and this can be accomplished without having to use an embedded operating system.

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Section: Introductionmentioning

confidence: 99%

A Dynamic Frequency Controlling Technique for Power Management in Existing Commercial Microcontrollers

Lueangvilai¹,

Robertson²,

Martinez

2012

Journal of Computing Science and Engineering

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“…These variations are further dived into two categories i.e. local or global depending upon the area it affects [7]. When all the transistors on die are affecting called global variation such as inter die process variation, temperature fluctuation where as the local variations affect the transistor which are influenced of one another such as IR drops.…”

Section: Introductionmentioning

confidence: 99%

Delay Error with Meta - Stability Detection and Correction Using CMOS Transmission Logic

Kankane

Sharma

Rizvi

2012

VLSICS

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“…It is that the scalable power supply structure prefers to the constant supply structure in order to high energy efficiency [1]. When the required performance of the target system is lower than the maximum performance, power supply voltage can be dynamically reduced to the lowest possible extent that ensures a proper operation of the system by using the DVS technique [2][3][4][5][6][7][8]. The DVS technique has dynamically varying power supply voltage according to the workload.…”

Section: Introductionmentioning

confidence: 99%

“…But, the reduced power supply V DDL in reported DVS-based processors is commonly 0.5 times of the power supply V DD . And energy efficiency in published DVS-based processors can be improved about 20% to 93% using DC-DC converter and voltage scheduler controlled by the operation system [2][3][4][5][6][7][8]. The power-delay and energy-delay product are the very important factors in DVS technique because the speed penalties due to lowering voltage can be occurred.…”

Section: Introductionmentioning

confidence: 99%

“…The reduced voltage can be selected between 1.5 times of the threshold voltage and 3 times of the threshold voltage for the optimization of the delay and performance in DVS technique and the energydelay product is minimum in the energy-power supply V DD plot when the power supply V DD is equal to the 2 times of the threshold voltage [9,10]. The Intel XScale [6], the IBM PowerPC [7], and the Transmeta Crusoe [8] are commercial processors using DVS technique. The DC-DC converter and the voltage scheduler controlled by the operation system are used in the commercial processors using DVS technique.…”

Section: Introductionmentioning

confidence: 99%

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Design of 32 bit Parallel Processor Core for High Energy Efficiency using Instruction-Levels Dynamic Voltage Scaling Technique

Yang¹,

Roh²,

Yeo³

et al. 2009

JSTS:Journal of Semiconductor Technology and Science

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Abstract-This paper describes design of high energy efficiency 32 bit parallel processor core using instructtion-levels data gating and dynamic voltage scaling (DVS) techniques. We present instruction-levels data gating technique. We can control activation and switching activity of the function units in the proposed data technique. We present instruction-levels DVS technique without using DC-DC converter and voltage scheduler controlled by the operation system. We can control powers of the function units in the proposed DVS technique. The proposed instruction-levels DVS technique has the simple architecture than complicated DVS which is DC-DC converter and voltage scheduler controlled by the operation system and a hardware implementation is very easy. But, the energy efficiency of the proposed instruction-levels DVS technique having dual-power supply is similar to the complicated DVS which is DC-DC converter and voltage scheduler controlled by the operation system. We simulate the circuit simulation for running test program using Spectra. We selected reduced power supply to 0.667 times of the supplied power supply. The energy efficiency of the proposed 32 bit parallel processor core using instruction-levels data gating and DVS techniques can improve about 88.4% than that of the 32 bit parallel processor core without using those. The designed high energy efficiency 32 bit parallel processor core can utilize as the coprocessor processing massive data at high speed.

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A 32-bit PowerPC system-on-a-chip with support for dynamic voltage scaling and dynamic frequency scaling

Cited by 181 publications

References 9 publications

A Dynamic Frequency Controlling Technique for Power Management in Existing Commercial Microcontrollers

A Dynamic Frequency Controlling Technique for Power Management in Existing Commercial Microcontrollers

Delay Error with Meta - Stability Detection and Correction Using CMOS Transmission Logic

Design of 32 bit Parallel Processor Core for High Energy Efficiency using Instruction-Levels Dynamic Voltage Scaling Technique

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