A 348-μW 68.8-dB SNDR 20-MS/s Pipelined SAR ADC With a Closed-Loop Two-Stage Dynamic Amplifier

Kwon, Yi-Gi; Kim, Tae‐Woong; Sun, Nan; Chae, Youngcheol

doi:10.1109/lssc.2021.3114318

Cited by 11 publications

(3 citation statements)

References 10 publications

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“…Although the two structures shown in Figures 6 and 10 achieve a closed-loop DC gain of greater than about 60 dB, it is still not enough to meet the design requirements of some applications with high precision and high dynamic range. To achieve a greater gain, an improved two-stage amplifer based on the FIA was proposed in [16], as shown in Figure 13. Te frst stage adopts the cascode FIA, and the second stage still uses a simple FIA, which achieves a high gain and still has a large output swing, but the structure is analyzed according to (2).…”

Section: Cascaded High-gain and High-input-range Fiamentioning

confidence: 99%

Analysis and Design of High-Energy-Efficiency Amplifiers for Delta-Sigma Modulators

Lai,

Lin,

Zhao

et al. 2023

Active and Passive Electronic Components

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This study presents a dynamic amplifier with high energy efficiency and high gain suitable for a delta-sigma modulator based on the floating-inverter amplifier (FIA), in-depth analysis of the existing FIA and its improved structure, and simulation verification. Compared with other FIA structures, the proposed amplifier has a better compromise in terms of power consumption and stability, which was designed and simulated using the SMIC 180 nm CMOS technology. Under a 1.2 V power supply, the closed-loop direct current (DC) gain and the output swing were about 104 dB and ±380 mV, respectively, and the input-referred in-band noise was about −100 dB with the chopper circuit.

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Section: Cascaded High-gain and High-input-range Fiamentioning

confidence: 99%

Analysis and Design of High-Energy-Efficiency Amplifiers for Delta-Sigma Modulators

Lai,

Lin,

Zhao

et al. 2023

Active and Passive Electronic Components

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“…In order to make better use of the advantages of each type of ADC, the hybrid ADCs have been proposed and continuously developed. Kwon et al [63] proposed a closed-loop two-stage dynamic amplifier for pipelined-SAR ADC. The proposed two-stage dynamic amplifier has a high DC gain, and good robustness against process, voltage, and temperature (PVT) variations without further calibration (as shown in Figure 16a).…”

Section: Hybrid Adcmentioning

confidence: 99%

A Survey on Analog-to-Digital Converter Integrated Circuits for Miniaturized High Resolution Ultrasonic Imaging System

et al. 2022

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As traditional ultrasonic imaging systems (UIS) are expensive, bulky, and power-consuming, miniaturized and portable UIS have been developed and widely utilized in the biomedical field. The performance of integrated circuits (ICs) in portable UIS obviously affects the effectiveness and quality of ultrasonic imaging. In the ICs for UIS, the analog-to-digital converter (ADC) is used to complete the conversion of the analog echo signal received by the analog front end into digital for further processing by a digital signal processing (DSP) or microcontroller unit (MCU). The accuracy and speed of the ADC determine the precision and efficiency of UIS. Therefore, it is necessary to systematically review and summarize the characteristics of different types of ADCs for UIS, which can provide valuable guidance to design and fabricate high-performance ADC for miniaturized high resolution UIS. In this paper, the architecture and performance of ADC for UIS, including successive approximation register (SAR) ADC, sigma-delta (Σ-∆) ADC, pipelined ADC, and hybrid ADC, have been systematically introduced. In addition, comparisons and discussions of different types of ADCs are presented. Finally, this paper is summarized, and presents the challenges and prospects of ADC ICs for miniaturized high resolution UIS.

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“…Several efforts have been made to improve the area-and-power efficiency of pipelined-SAR ADCs, which is critical in a multi-channel application. A popular and effective improvement is to replace the power-hungry op-amps with amplifiers without DC power consumption, such as ringamp [10,11], dynamic amplifiers [12,13], or to use open-loop amplifiers [14,15]. Though these designs significantly reduce the power consumption of RA, they suffer from PVT fluctuations and often rely on complex background calibration.…”

Section: Pipelined-sar Adcmentioning

confidence: 99%

A Calibration-Free, 16-Channel, 50-MS/s, 14-Bit, Pipelined-SAR ADC with Reference/Op-Amp Sharing and Optimized Stage Resolution Distribution

Ren

2022

Electronics

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This paper presents a calibration-free, 16-channel, 14-bit, 50-MS/s, pipelined successive approximation register (pipelined-SAR) analog-to-digital converter (ADC) for ultrasound imaging systems. A reference sharing scheme with reduced buffers is proposed to improve area-and-power efficiency, which is essential for multi-channel systems. Based on this, a three-stage, pipelined-SAR ADC architecture with reference/op-amp sharing and optimized stage resolution distribution is proposed. The prototype ADC is designed in a 0.18-μm process with peripheral circuits integrated, including low-voltage differential signaling (LVDS), bandgap, etc. It achieves a robust and calibration-free performance with 68.25-dB signal to noise and distortion ratio (SNDR) and 82.19-dB spurious-free dynamic range (SFDR), translating into a competitive figure of merit (FoM) of 0.47 pJ/conversion-step among other high-resolution ADCs used in ultrasound applications.

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A 348-μW 68.8-dB SNDR 20-MS/s Pipelined SAR ADC With a Closed-Loop Two-Stage Dynamic Amplifier

Cited by 11 publications

References 10 publications

Analysis and Design of High-Energy-Efficiency Amplifiers for Delta-Sigma Modulators

Analysis and Design of High-Energy-Efficiency Amplifiers for Delta-Sigma Modulators

A Survey on Analog-to-Digital Converter Integrated Circuits for Miniaturized High Resolution Ultrasonic Imaging System

A Calibration-Free, 16-Channel, 50-MS/s, 14-Bit, Pipelined-SAR ADC with Reference/Op-Amp Sharing and Optimized Stage Resolution Distribution

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