A 3rd-Order FIR Filter Implementation Based on Time-Mode Signal Processing

Abstract

This paper presents the hardware implementation of a 3rd-order low-pass finite impulse response (FIR) filter based on time-mode signal processing circuits. The filter topology consists of a set of novel building blocks that perform the necessary functions in time-mode including z−1 operation, time addition and time multiplication. The proposed time-mode low-pass FIR filter was designed in a 28 nm Samsung fully-depleted silicon-on-insulator FD-SOI process under 1 V supply voltage with 5 MHz sampling frequency. Simulation results validate the theoretical analysis. The FIR filter achieves a signal-to-noise-plus-distortion ratio (SNDR) of 38.6 dB at the input frequency of 50 KHz consuming around 200 μW.

A Time-Mode PWM 1st Order Low-Pass Filter

“…The time-mode processing unit could include many simple operations like a z −1 operation, addition, 2 of 13 subtraction, amplification [6], or multiplication [7,8]. Furthermore, a combination of these simple operations can be achieved if more complex processing is needed (e.g., time-mode filtering [9][10][11] and time-mode integrators [12][13][14]). Finally, the processed time-mode signal is converted back to the voltage mode via a time-to-voltage converter (TVC).…”