A 4.2-mW 10-MHz BW 74.4-dB SNDR Continuous-Time Delta-Sigma Modulator With SAR-Assisted Digital-Domain Noise Coupling

Jang, Il-Hoon; Seo, Min-Jae; Cho, Sang Hyun; Lee, Jae-Keun; Baek, Seung-Yeob; Kwon, Sunwoo; Choi, Michael; Ko, Hyung–Jong; Ryu, Seung‐Tak

doi:10.1109/jssc.2017.2778284

Cited by 25 publications

(8 citation statements)

References 17 publications

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“…Moreover, the main‐ADC, NC‐ADC, and NC‐DAC are embedded in a single SAR ADC which makes the overall circuit implementation very efficient. The output of the DNC architecture is given by [4],

\begin{eqnarray} V=STF\cdot U+NTF(1-H_{D})E_{1}-NTF\cdot H_{D}\cdot E_{2}, \end{eqnarray}

where STF and NTF denote the signal transfer function (STF) and the noise transfer function (NTF), respectively. As shown in (),

E_1

is shaped by the DNC path as well as the main loop.…”

Section: Overview Of Dr Loss In Dncmentioning

confidence: 99%

“…Moreover, the main-ADC, NC-ADC, and NC-DAC are embedded in a single SAR ADC which makes the overall circuit implementation very efficient. The output of the DNC architecture is given by [4],…”

Section: Overview Of Dr Loss In Dncmentioning

confidence: 99%

“…Figure 1 shows a simplified block diagram of the DNC structure in [4]. In this structure, the quantization noise

E_1

is converted to digital code through the noise coupling ADC (NC‐ADC) and then processed in the digital filter

H_D

.…”

Section: Overview Of Dr Loss In Dncmentioning

confidence: 99%

“…A digital domain filter was proposed to address the issues with the analog noise-coupling (ANC) structure. The digital noise-coupling (DNC) in [4,5] eliminates the power-consuming analog circuits and realizes a simple noise-coupling filter in digital domain. In addition, the building blocks required for implementing the DNC structure can be implemented hardware efficiently by utilizing the structural advantages of the successive-approximation register (SAR) ADC.…”

mentioning

confidence: 99%

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A digital prediction compensation for DR improvement in CT DSM with digital noise coupling

Pang,

Ou,

2024

Electronics Letters

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This paper presents a prediction‐based dynamic range (DR) compensation technique in continuous‐time (CT) delta ‐sigma modulator (DSM) with digital‐domain noise coupling (DNC) structure. A digital prediction technique is proposed to address the issue of maximum stable amplitude (MSA) loss caused by DNC. The proposed prediction method has been shown to significantly extend the MSA of CT DSM with DNC. Moreover, through the extension of MSA, the DR and SNDR is significantly improved. A CTDSM with proposed compensation achieves a SNDR of 85.1dB at ‐1dBFS and a DR of 89dB.

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\begin{eqnarray} V=STF\cdot U+NTF(1-H_{D})E_{1}-NTF\cdot H_{D}\cdot E_{2}, \end{eqnarray}

where STF and NTF denote the signal transfer function (STF) and the noise transfer function (NTF), respectively. As shown in (),

E_1

is shaped by the DNC path as well as the main loop.…”

Section: Overview Of Dr Loss In Dncmentioning

confidence: 99%

Section: Overview Of Dr Loss In Dncmentioning

confidence: 99%

“…Figure 1 shows a simplified block diagram of the DNC structure in [4]. In this structure, the quantization noise

E_1

is converted to digital code through the noise coupling ADC (NC‐ADC) and then processed in the digital filter

H_D

.…”

Section: Overview Of Dr Loss In Dncmentioning

confidence: 99%

mentioning

confidence: 99%

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A digital prediction compensation for DR improvement in CT DSM with digital noise coupling

Pang,

Ou,

2024

Electronics Letters

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show abstract

“…The main challenge of this work is to keep the area of the SD-ADC below 0.5 mm 2 , while keeping the resolution over 12-bit. Therefore, this structure avoids applying Half-Band (HB) filters in the decimation filter as they are bulky and power-hungry blocks [8,9,10,11]. Consequently, a small area SD-ADC is proposed in this paper.…”

Section: Introductionmentioning

confidence: 99%

A Sigma-Delta ADC for Signal Conditioning IC of Automotive Piezo-Resistive Pressure Sensors with over 80 dB SNR

Rikan

Kim

Ahmad

et al. 2018

Sensors

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This paper presents a second-order discrete-time Sigma-Delta (SD) Analog-to-Digital Converter (ADC) with over 80 dB Signal to Noise Ratio (SNR), which is applied in a signal conditioning IC for automotive piezo-resistive pressure sensors. To reduce the flicker noise of the structure, choppers are used in every stage of the high gain amplifiers. Besides, to reduce the required area and power, only the CIC filter structure is adopted as a decimation filter. This filter has a configurable structure that can be applied to different data rates and input signal bandwidths. The proposed ADC was fabricated and measured in a 0.18-µm CMOS process. Due to the application of only a CIC filter, the total active area of the SD-ADC and reference generator is 0.49 mm2 where the area of the decimation filter is only 0.075 mm2. For the input signal bandwidth of 1.22 kHz, it achieved over 80 dB SNR in a 2.5 MHz sampling frequency while consuming 646 µW power.

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A 10-MHz 85.1-dB SFDR 1.1-mW continuous-time Delta–sigma modulator employing calibration-free SC DAC and passive front-end low-pass filter

Jin

Pun

2023

Microelectronics Journal

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A 4.2-mW 10-MHz BW 74.4-dB SNDR Continuous-Time Delta-Sigma Modulator With SAR-Assisted Digital-Domain Noise Coupling

Cited by 25 publications

References 17 publications

A digital prediction compensation for DR improvement in CT DSM with digital noise coupling

A digital prediction compensation for DR improvement in CT DSM with digital noise coupling

A Sigma-Delta ADC for Signal Conditioning IC of Automotive Piezo-Resistive Pressure Sensors with over 80 dB SNR

A 10-MHz 85.1-dB SFDR 1.1-mW continuous-time Delta–sigma modulator employing calibration-free SC DAC and passive front-end low-pass filter

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