A 4-antenna transmitter in 0.18µm CMOS using space-time block codes

Abstract

Efficient power delivery is a challenge in many RF systems. The use of space-time block codes as a means for reducing the required output power of the power amplifier and thereby improving the system efficiency is described. The first implementation of a fully-integrated 4-antenna transmitter based on space-time block codes is described. It is fully configurable as a 1-, 2-, 3-, and 4-antenna system to investigate the tradeoffs between space-time block code length and overall system efficiency. It is shown that the measured optimum is a 3-antenna system capable of delivering +27.7 dBm into a 50 Ω load using three class-AB power amplifier cells each delivering +20 dBm into 50 Ω with a PAE of 23%. Owing to the space-time block coding gain, the overall PAE of the 3-channel transmitter delivering +27.7 dBm is 39%. The system is intenerated in 0.18µm CMOS and measures 4mm x 6mm.