A 4 bit highly energy and area efficient SC SAR ADC based on a combinational technique with reduced reset energy

Ghoshal, Pranati; Dey, Chanchal; Sen, Samita

doi:10.1007/s00542-019-04672-0

Cited by 3 publications

(3 citation statements)

References 30 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Te MSB capacitor is arranged as the conventional binary-weighted technique, while the next 9 bits are divided into two-stage subarray capacitors that replace the big-weight capacitors with 7 equal capacitors. Several works have adopted special arrangements for capacitor array technique [54][55][56][57][58][59][60][61]. Te asymmetric capacitors technique [54] is shown in Figure 17, where MSB on the higher side of the capacitor array is removed.…”

Section: Capacitive Dac Array (Cdac)mentioning

confidence: 99%

“…Tis helps the proposed single-side technique to detect and skip switching in the main stage. Te junction splitting technique is utilized in [60,61]. Te capacitor's array is split into sections of subcapacitors, which are connected in series by switches as illustrated in Figure 22.…”

Section: Capacitive Dac Array (Cdac)mentioning

confidence: 99%

“…Mainly, two parameters have been utilized to achieve power consumption reduction: decreasing the size of the capacitor array and using diferent level voltages. Te Scaled down reference [33] Scaled down reference [36] Monotonic [18] Monotonic [40] Charge redistribution [60] Two-step switching method [63] Charge sharing [22] Tri-level [65] Vcm-based [66] Hybrid [70] Hybrid [35] HSRS [73] Two energy saving [71] HSRS [76] Vaq-based [79] Vaq-based [31] Switching CDAC is suitable for the low-power SAR ADC. However, the diferent voltage switching schemes can improve the switching power consumption.…”

Section: Fom W � P Adcmentioning

confidence: 99%

See 2 more Smart Citations

Successive Approximation Register Analog-to-Digital Converter (SAR ADC) for Biomedical Applications

Arafa

Ellaithy

Zekry

et al. 2023

Active and Passive Electronic Components

View full text Add to dashboard Cite

This study presents a survey of the most promising reported SAR ADC designs for biomedical applications, stressing advantages, disadvantages, and limitations, and concludes with a quantitative comparison. Recent progress in the development of a single SAR ADC architecture is reviewed. In wearable and biosensor systems, a very small amount of total power must be devoured by portable batteries or energy-harvesting circuits in order to function correctly. During the past decade, implementation of the high energy efficiency of SAR ADC has become the most necessary. So, several different implementation schemes for the main components of the SAR ADC have been proposed. In this review study, the various circuit architectures have been explained, beginning with the sample and hold (S/H) switching circuits, the dynamic comparator, the internal digital-to-analog converter (DAC), and the SAR control logic. In order to achieve low power consumption, numerous different configurations of dynamic comparator circuits are revealed. At the end of this overview, the evolutions of DAC architecture in distinct biomedical applications today can make a tradeoff between resolution, speed, and linearity, which represent the challenges of a single SAR ADC. For high resolution, the dual split capacitive DAC (CDAC) array technique and hybrid capacitor technique can be used. Also, for ultralow power consumption, various voltage switching schemes are achieved to reduce the number of switches. These schemes can save switching energy and reduce capacitor array area with high linearity. Additionally, to increase the speed of the conversion process, a prediction-based ADC design is employed. Therefore, SAR ADC is considered the ideal solution for biomedical applications.

show abstract