A 4 bit Quantum Voltage Comparator based flash ADC for low noise applications

Kalita, Triveni; Das, Basab

doi:10.1109/icedss.2016.7587689

Cited by 6 publications

(3 citation statements)

References 16 publications

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“…Flash ADCs are designed for a variety of applications, including high‐speed instrumentation applications, radar engineering applications, wireless sensor network, and optical communication 3–5 . For radar system applications, 6–8 ADCs are required to be of resolution of more than 8 bits and a sampling rate of more than 2 GS/s. Considering the Flash ADCs are best suited for high speed due to their one‐clock‐based conversion; however, high power consumption, large input capacitance, and calibration overhead for the comparator offset are still the major bottlenecks due to a large number of comparators involved, as moving from low‐ to mid‐resolution ADC architectures.…”

Section: Introductionmentioning

confidence: 99%

An artificial intelligence‐based 4‐to‐10‐bit variable resolution Flash ADC with 3.6 to 1.04 GS/s sampling rate

Kandpal,

Singh,

Agarwal

2024

Circuit Theory & Apps

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This paper presents an artificially intelligent Flash ADC with enhanced resolution from 4 to 10 bits. Unlike conventional approaches, this artificial intelligence (AI)‐based architecture avoids the use of many number of comparators in the Flash ADC when the ADC's resolution changes from 4 to 10 bits. This work initially gets the digital output of a 4‐bit existing Flash ADC as a training data set and then uses these 4‐bit output bits and sends to resolution enhancement logic (REL) block to vary its resolution without increasing the hardware complexities. After simulation, it is observed that the proposed ADC is of SNR of 24.13 dB for 4‐bit Flash ADC designed in SCL 180 nm CMOS technology and increases from 36.89 to 60.70 dB for 6 to 10‐bit resolution, respectively. The sampling frequency of the proposed architecture ranges from 3.6 to 1.04 GHz for a change in resolution from 4 to 10 bits. The FoM of 235 fJ/conv‐step in the training phase is obtained, and it varies from 56 to 20.3 fJ/conv‐step in the next phase of the testing and the prediction. The estimated area of the proposed 4‐to‐10‐bit variable resolution Flash ADC is μm2.

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Section: Introductionmentioning

confidence: 99%

An artificial intelligence‐based 4‐to‐10‐bit variable resolution Flash ADC with 3.6 to 1.04 GS/s sampling rate

Kandpal,

Singh,

Agarwal

2024

Circuit Theory & Apps

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show abstract

“…In high-speed applications, flash ADC is the preferable choice for the designer as it offers high data conversion speed due to its parallel operation but with low resolution [1,2]. Flash ADC is used in many applications like high-speed instrumentation, radar, wireless sensor network, digital oscilloscopes, digital TVs, camera and optical communications [3][4][5].…”

Section: Introductionmentioning

confidence: 99%

Highly‐digital voltage scalable 4‐bit flash ADC

Gupta

Singh

Agarwal

2018

IET Circuits, Devices & Systems

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This study describes the highly-digital 4-bit 200 MS flash analogue to digital converter (ADC) whose major part can be digitally synthesised thus achieving low power, reducing the time-to-market and is scalable with technology. The comparators used in the ADC consist of complementary metal-oxide-semiconductor (CMOS)-based inverter and NAND-NOR as standard cells. The complete flash ADC is designed in 180 nm CMOS technology with 1.8 V supply with the power consumption of 4.51 mW. The signal-to-noise and distortion ratio, signal-to-noise ratio and spurious-free dynamic range are equal to 23.3, 25.2 and 30.1 dB. It provides an effective number of bits equal to 3.5. The differential non-linearity (DNL) of this ADC is ± 0.25 LSB and integral non-linearity (INL) is + 0.6 LSB.

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“…Therefore, flash ADC is used as a subcomponent of other ADCs. For instance, many pipeline ADCs use a 1.5-bit flash ADC as a subcomponent [1][2][3][4][5][6].…”

Section: Introductionmentioning

confidence: 99%

Expandable Flash-Type CMOS Analog-to-Digital Converter for Sensor Signal Processing

Oh¹,

Choi²,

Kim³

et al. 2017

Journal of Sensor Science and Technology

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The analog-to-digital converter (ADC) is an important component in various fields of sensor signal processing. This paper presents an expandable flash analog-to-digital converter (E-flash ADC) for sensor signal processing using a comparator, a subtractor, and a multiplexer (MUX). The E-flash ADC was simulated and designed in 0.35-µm standard complementary metal-oxide semiconductor (CMOS) technology. For operating the E-flash ADC, input voltage is supplied to the inputs of the comparator and subtractor. When the input voltage is lower than the reference voltage, it is outputted through the MUX in its original form. When it is higher than the reference voltage, the reference voltage is subtracted from the input value and the resulting voltage is outputted through the MUX. Operation of the MUX is determined by the output of the comparator. Further, the output of the comparator is a digital code. The E-flash ADC can be expanded easily.

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A 4 bit Quantum Voltage Comparator based flash ADC for low noise applications

Cited by 6 publications

References 16 publications

An artificial intelligence‐based 4‐to‐10‐bit variable resolution Flash ADC with 3.6 to 1.04 GS/s sampling rate

An artificial intelligence‐based 4‐to‐10‐bit variable resolution Flash ADC with 3.6 to 1.04 GS/s sampling rate

Highly‐digital voltage scalable 4‐bit flash ADC

Expandable Flash-Type CMOS Analog-to-Digital Converter for Sensor Signal Processing

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