A 400-V Half Bridge Gate Driver for Normally-Off GaN HEMTs With Effective <i>Dv/Dt</i> Control and High <i>Dv/Dt</i> Immunity

Yu, Siyuan; Zhou, Qi; Shi, Gang; Wu, Tao; Zhu, Jun‐Jie; Zhang, Long; Sun, Weifeng; Zhang, Sen; He, Nailong; Li, Ye

doi:10.1109/tie.2022.3153808

Cited by 17 publications

(5 citation statements)

References 28 publications

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“…In half-bridge gate driver, the output gate control signal must have a large current [22,23]. Usually the high-side and low-side output drive circuits use the same structure and have the same drive capability [24,25].…”

Section: Analyze Of the Existing Output Drive Circuitmentioning

confidence: 99%

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Design of a 5MHz half-bridge gate driver for GaN HEMTs with adaptive output current

Li,

Zhou,

Huang

et al. 2023

IEICE Electron. Express

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In this paper, a half-bridge gate driver with adaptive output current for GaN HEMTs is introduced. The output drive current of the driver is adapted to the load of GaN HEMTs, by adjusting the W/L size of drive transistors. The rise time of driver is achieved to be basically constant by the adaptive output current adjustment for different load, so noise can be effectively immunized and working efficiency is improved. Based on the proposed adaptive output current drive circuit, a halfbridge gate driver is designed and implemented in the 180nm BCD process. Tested results show the driver has a constant rise time of about 5ns under 5MHz with C L of 0.5nF, 2.0nF, and 3.5nF respectively.

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Section: Analyze Of the Existing Output Drive Circuitmentioning

confidence: 99%

“…The output drive capacity of existing half bridge drivers is generally fixed [11,12]. In most applications, in order to prevent output current from damaging the gate of power devices, a protective resistor is usually connected in series at the output of the driver [13,14]. The protection resistor will cause two problems.…”

Section: Introductionmentioning

confidence: 99%

Design of a 5MHz half-bridge gate driver for GaN HEMTs with adaptive output current

Li,

Zhou,

Huang

et al. 2023

IEICE Electron. Express

View full text Add to dashboard Cite

show abstract

“…The high d v /d t can cause several problems, such as insulation breakdown, electromagnetic interference [7, 8] and excessive overvoltage [9], which reduces the system's reliability. The issue of d v /d t can be effectively mitigated by using semiconductor switches with a lower slew ratio, such as increasing the gate series resistor [10] or active gate driving techniques [7]. However, these methods may increase the switching losses.…”

Section: Introductionmentioning

confidence: 99%

“…lower slew ratio, such as increasing the gate series resistor [10] or active gate driving techniques [7]. However, these methods may increase the switching losses.…”

mentioning

confidence: 99%

An ampere‐second‐vector pulse width modulation technique and fault‐tolerant control for CSI11 fed five‐phase permanent magnet synchronous motor with multiple harmonic electromotive forces

Chen,

Sun

et al. 2023

IET Electric Power Appl

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When dealing with safety‐critical applications that involve multiphase permanent magnet synchronous motors (PMSMs), the current source inverter (CSI) is a superior choice compared with the voltage source inverter. The conventional technique of pulse width modulation (PWM) presents a challenge for CSI, particularly during faults. The fault‐tolerant control of multiphase PMSMs fed by CSIs has not been well investigated, particularly in situations involving double‐phase open‐circuit faults. Furthermore, fault‐tolerant control becomes more complex when the multiphase PMSM includes harmonic back electromotive forces (EMFs). To deal with these issues, an ampere‐second (AS) vector PWM technique is developed for a five‐phase PMSM powered by CSI11. The modulation ratio of the proposed PWM is identical to that of space vector PWM. The proposed method, however, is easier to implement. A fault‐tolerant control method using AS‐vector is proposed for single‐phase, adjacent double‐phase, and non‐adjacent double‐phase open‐circuit faults. Additionally, a method is developed to suppress the torque ripple that results from harmonic back‐EMFs during fault conditions. Compared without the torque ripple suppression method, during the speed rising, the proposed method can reduce torque ripple to 16.7%, 54.5%, and 37.5%, respectively. The experiments have confirmed the effectiveness of the proposed PWM technique and fault‐tolerant control method.

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“…However, the GaN and SiC MOSFET can generate larger dV/dt and di/dt noise in the fast switching. For GaN MOSFET, the dV/dt could be up to above 200 V/ns [9]. This fast slewing is particularly problematic on the high side of the half-bridge driver, as shown in Figure 1.…”

Section: Introductionmentioning

confidence: 99%

A New Design Technique for a High-Speed and High dV/dt Immunity Floating-Voltage Level Shifter

Guo,

Wang,

Wang

et al. 2023

Electronics

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This paper presents a high-speed level shifter with about 500 V/ns power supply slew immunity. In this designed structure, a narrow pulse-controlled current source is adapted to accelerate the voltage conversion and reduce the power consumption. A Fast-Slewing Circuit speeds up the operation of the level shifter based on the current comparison principle. Edge detection technology is used to filter the generated voltage noise and achieve high dV/dt immunity. The proposed level shifter simulated with the 0.18 μm BCD (bipolar-CMOS-DMOS) process shows fast responses with a typical delay of 1.49 ns and 500 V/ns dV/dt immunity in the 200 V high-voltage application, which only occupies a 0.022 mm2 active area with the 0.18 μm BCD process.

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A 400-V Half Bridge Gate Driver for Normally-Off GaN HEMTs With Effective Dv/Dt Control and High Dv/Dt Immunity

Cited by 17 publications

References 28 publications

Design of a 5MHz half-bridge gate driver for GaN HEMTs with adaptive output current

Design of a 5MHz half-bridge gate driver for GaN HEMTs with adaptive output current

An ampere‐second‐vector pulse width modulation technique and fault‐tolerant control for CSI11 fed five‐phase permanent magnet synchronous motor with multiple harmonic electromotive forces

A New Design Technique for a High-Speed and High dV/dt Immunity Floating-Voltage Level Shifter

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