A 48-dB SFDR, 43-dB SNDR, 50-GS/s 9-b 2×-Interleaved Nyquist DAC in Intel 16

Chandrakumar, Hariprasad; Brown, Thomas W.; Frolov, Dimitri; Tuli, Zinia; Huang, Iwen; Rami, Said

doi:10.1109/lssc.2022.3205884

IEEE Solid-State Circuits Lett.

2022

DOI: 10.1109/lssc.2022.3205884

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A 48-dB SFDR, 43-dB SNDR, 50-GS/s 9-b 2×-Interleaved Nyquist DAC in Intel 16

Hariprasad Chandrakumar

Thomas W. Brown

Dimitri Frolov

et al.

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2024

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Cited by 2 publications

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“…In typical (coherent) transmitters, the output of the CMOS DAC is usually incapable of driving a high-speed Mach-Zehnder modulator (MZM) directly because the DAC output swing is lower than the required V π of the MZM [4], [5], which could be around 5 V. In modern MZM designs, designers have to trade off modulation efficiency and bandwidth performance, targeting high-speed data transmission [6], [7]. Therefore, a broadband driver with a sufficiently high drive swing is essential for the MZM to achieve good electro-optical modulation efficiency without sacrificing too much bandwidth performance.…”

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confidence: 99%

A Linear Modulator Driver With Over 70-GHz Bandwidth 21.8-dB Gain and 3.4-Vppd Output Swing for Beyond 120-GBd Optical Links

Niu,

Ahmed,

Lambrecht

et al. 2024

IEEE Trans. Microwave Theory Techn.

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This article investigates a linear differential modulator driver for optical communication links beyond 120 GBd. The driver was implemented in a 55-nm SiGe BiCMOS technology with an f T / f MAX of 330/370 GHz, featuring a traveling wave output stage driven by a lumped variable gain amplifier (VGA) and a predriver. The fabricated IC achieved a maximum low-frequency gain of 21.8 dB with more than 10-dB gain control capability and a 3-dB bandwidth of over 70 GHz. Power measurement results show the driver is able to deliver a constant output swing of 3.56 Vppd while keeping the THD below 2%, with the differential input swing varying from 0.3 to 1.03 Vppd at 1 GHz. In the largesignal measurement, the chip delivered 72, 106, 112, and 128 GBd pulse amplitude modulation-4 (PAM-4) signals with differential output swings of 4, 3.59, 3.434, and 3.425 Vppd, respectively. The chip's total power consumption is 725 mW, resulting in a power efficiency of 2.83 pJ/bit. Overall, this is the first time an optical modulator driver reported the ability to accommodate such a wide input swing and demonstrated the operation at a data rate of 256 Gb/s. These features make it a desired candidate for beyond 120-GBd optical links.

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confidence: 99%

A Linear Modulator Driver With Over 70-GHz Bandwidth 21.8-dB Gain and 3.4-Vppd Output Swing for Beyond 120-GBd Optical Links

Niu,

Ahmed,

Lambrecht

et al. 2024

IEEE Trans. Microwave Theory Techn.

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A 65-nm CMOS 1 GS/s 45 mW Hybrid Digital-to-Analog Converter (DAC) With Digital Deglitch Mechanism Achieving 13.83 fJ/step FOM for 5G New Radio Sub-6 GHz Applications

Idros,

Rajendran,

Mariappan

et al. 2024

IEEE Access

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scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.

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A 48-dB SFDR, 43-dB SNDR, 50-GS/s 9-b 2×-Interleaved Nyquist DAC in Intel 16

Cited by 2 publications

References 11 publications

A Linear Modulator Driver With Over 70-GHz Bandwidth 21.8-dB Gain and 3.4-Vppd Output Swing for Beyond 120-GBd Optical Links

A Linear Modulator Driver With Over 70-GHz Bandwidth 21.8-dB Gain and 3.4-Vppd Output Swing for Beyond 120-GBd Optical Links

A 65-nm CMOS 1 GS/s 45 mW Hybrid Digital-to-Analog Converter (DAC) With Digital Deglitch Mechanism Achieving 13.83 fJ/step FOM for 5G New Radio Sub-6 GHz Applications

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