A 4H-SiC semi-super-junction shielded trench MOSFET: p-pillar is grounded to optimize the electric field characteristics

Abstract

A 4H-SiC trench gate metal–oxide–semiconductor field-effect transistor (UMOSFET) with semi-super-junction shielded structure (SS-UMOS) is proposed and compared with conventional trench MOSFET (CT-UMOS) in this work. The advantage of the proposed structure is given by comprehensive study of the mechanism of the local semi-super-junction structure at the bottom of the trench MOSFET. In particular, the influence of the bias condition of the p-pillar at the bottom of the trench on the static and dynamic performances of the device is compared and revealed. The on-resistance of SS-UMOS with grounded (G) and ungrounded (NG) p-pillar is reduced by 52% (G) and 71% (NG) compared to CT-UMOS, respectively. Additionally, gate oxide in the GSS-UMOS is fully protected by the p-shield layer as well as semi-super-junction structure under the trench and p-base regions. Thus, a reduced electric-field of 2 MV/cm can be achieved at the corner of the p-shield layer. However, the quasi-intrinsic protective layer cannot be formed in NGSS-UMOS due to the charge storage effect in the floating p-pillar, resulting in a large electric field of 2.7 MV/cm at the gate oxide layer. Moreover, the total switching loss of GSS-UMOS is 1.95 mJ/cm2 and is reduced by 18% compared with CT-UMOS. On the contrary, the NGSS-UMOS has the slowest overall switching speed due to the weakened shielding effect of the p-pillar and the largest gate-to-drain capacitance among the three. The proposed GSS-UMOS plays an important role in high-voltage and high-frequency applications, and will provide a valuable idea for device design and circuit applications.

Investigations of 4H‐SiC trench MOSFET with integrated high‐K deep trench and gate dielectric

“…However, due to the lower R on,sp of INHK-TMOS, its high-frequency figure of merit (HFFOM, HFFOM = Q GD •R on,sp [24]) decreases to 2.78 × 10 Figure 15 compares the relationship between the R on,sp and BV of CONV-TMOS, HKGD-TMOS, and INHK-TMOS with other simulation or experimental results cited in this paper. In reference [10], the optimized HKSG-MOS with K = 30 achieves a BV of 1865 V and R on,sp of 1.77 mΩ⋅cm 2 . However, the proposed INHK-TMOS in this study not only surpasses the BV of the HKSG-MOS, but also exhibits a reduced R on,sp .…”

“…However, achieving high BV in SiC devices typically requires a long drift region and low drift region doping concentration (N D ), resulting in a significant increase in specific on-resistance (R on,sp ). To address this issue, the super-junction technique has been proposed [9][10][11]. By introducing P-type regions within the drift region, alternating PN columns are formed.…”

High‐Performance SiC/Graphene UV‐Visible Band Photodetectors with Grating Structure and Asymmetrical Electrodes for Optoelectronic Logic Gate

“…[36] As a representative wide bandgap semiconductor, SiC has advantages such as high critical breakdown electric field, high thermal conductivity, and high carrier saturation drift velocity, which is suitable for optoelectronic, radiation-resistant, highpower, high-temperature fields. [37][38][39][40] Meanwhile, It promises to investigate SiC/Graphene (SG) heterojunction PDs to achieve UV-visible dual-band detection due to the wide bandgap and significant response to UV light of SiC. However, the Graphene/SiC/Graphene (GSG) UV PDs exhibit relatively low responsivity and quantum efficiency due to the nanometer-thick depletion layer at the SG junction.…”