A 5.6 ppm/°C Temperature Coefficient, 87-dB PSRR, Sub-1-V Voltage Reference in 65-nm CMOS Exploiting the Zero-Temperature-Coefficient Point

Jiang, Jin; Shu, Wei; Chang, Joseph S.

doi:10.1109/jssc.2016.2627544

Cited by 78 publications

(27 citation statements)

References 26 publications

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“…These voltage references should be insensitive to variations in process, temperature and supply voltage [1][2][3][4][5][6]. The performance of many mixed analog/digital systems is limited by inaccuracies and power supply noise coupling errors in integrated voltage references.…”

Section: Introductionmentioning

confidence: 99%

A Resistorless Voltage Reference with High-order Temperature Curvature Compensation in 55 nm CMOS Process

Zhang²,

Zhang

et al. 2017

Proceedings of the 2017 5th International Conference on Mechatronics, Materials, Chemistry and Computer Engineering (ICMMCCE 20

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This paper presents a temperature/supply stable and resistorless voltage reference for high-precision portable electronic products. the reference obtains a good temperature coefficient over a wide temperature range through high-order curvature compensation. In order to reduce the temperature nonlinearity, the piecewise linear temperature curvature compensation circuit is used. The voltage reference is simulated with 55nm CMOS technology. It operates at the voltage of 2.5V and generates a stable voltage at 0.742V with a minimal temperature coefficient of 3.19ppm/℃ for temperature ranging from -40 to 125℃.

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Section: Introductionmentioning

confidence: 99%

A Resistorless Voltage Reference with High-order Temperature Curvature Compensation in 55 nm CMOS Process

Zhang²,

Zhang

et al. 2017

Proceedings of the 2017 5th International Conference on Mechatronics, Materials, Chemistry and Computer Engineering (ICMMCCE 20

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“…The LDO features very high PSRR over a wide frequency range and large load current range, low dropout voltage, and small overshoot and undershoot. Circuits [107], 2018 IEEE Nuclear and Space Radiation Effects Conference (NSREC) [109], and described in a patent application [110].…”

Section: Discussionmentioning

confidence: 99%

“…The thermal noise dominates at frequencies beyond 1kHz where the noise density is 40nV/Hz 1/2 . The primary noise contributor in LDOs is the voltage reference noise [24], and a lower LDO output noise can be obtained with a lower noise voltage reference [51,107]. In the proposed LDO, the reference voltage is externally generated.…”

Section: Psrr Measurementsmentioning

confidence: 99%

Design and realization of low dropout voltage regulator and voltage reference in deep-submicron CMOS for emerging Internet-of-Things and satellites

Jiang¹

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“…Dead-Time Circuit G ID (s) Figure 2.33 Control diagram of the LED driver with type II compensation network Equation 2.12 depicts that the LED driver with type II compensation network has four poles (P1≈1/R1C2, P2≈1/R2C1, P3=P4≈1/ O LC ) and two zeros (Z1≈1/R2C2, Z2≈1/RCO). For the loop gain design, the crossover frequency is set at fC≈fSW/7 by appropriately setting the first zero (Z1) and the second pole (P2) to introduce the crossover frequency, and placing the second zero (Z2) around the conjugate poles (P3 and P4) arising from the output LCO low-pass filter [14,30,86,119]. By this means, we are able to obtain good stability for the LED driver.…”

Section: Small-signal Modelingmentioning

confidence: 99%

“…Put simply, the slope compensation complicates the design. Figure 3.5 depicts the circuit schematic of the proposed ACC controller whose block diagram was earlier depicted in Figure 3 The current reference, IREF=VREF/RIL can be adjusted by the off-chip resistor RIL, [14], [119]. The cascode current mirror provides a wide output voltage swing at node B, thereby providing a wide PWM duty-cycle range.…”

Section: Proposed Designs and Circuitry Implementationsmentioning

confidence: 99%

Design and realization of high-performance LED drivers for automotive lighting applications

Qu¹

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This Ph.D. program pertains to the design and monolithic realization of Light Emitting Diode (LED) drivers for automotive lighting where the imperative parameters are high power-efficiency and high reliability. The grand objectives thereto are substantial improved specifications over the state-of-the-art, including power-efficiency, reliability, current driving capability, and dimming range. To achieve the said grand objectives, the specific objectives are to decouple, and hence mitigate the following two major design trade-offs that limit the performance of contemporary automotive LED drivers. The first trade-off is between high reliability and high current driving capability, and applies to both single-phase and multi-phase LED drivers. Specifically, to achieve high current driving capability, the contemporary single-phase LED driver typically suffers from low reliability arising from large current ripples. On the other hand, the multi-phase LED driver is highly advantageous to provide high current driving capability, but suffers from low reliability because of the ensuing subharmonic oscillation. To decouple this limiting trade-off, we propose the design and monolithic realization of a novel Pulse-Width-Modulation (PWM)-based dual-phase LED driver in Global Foundries (GF) 130nm BCDLite process. To achieve high current driving capability, we adopt a dual-phase power stage. To achieve high reliability, we propose an Average Current Control to eliminate the subharmonic oscillation by considering the complete inductor-current profile vis-à-vis peak current adopted/reported elsewhere. To further improve the reliability, we propose an accuracy-enhanced current sensor to ascertain good current balance in the adopted dual-phase power stage. With measurements on our prototype LED driver ICs embodying our aforesaid adoption and vi proposed circuits, we demonstrate, to the best of our knowledge, for the first time that the trade-off between high reliability and high current driving capability is decoupled, i.e., an LED driver uniquely featuring high reliability, yet high current driving capability. The second trade-off is between high power-efficiency and wide dimming range. Specifically, a wide dimming range is derived by means of high switching frequency, hence the ensuing reduced settling time of the LED current. This, however, in turn leads to a degradation of the power-efficiency due to increased switching losses. To decouple this limiting trade-off, we propose the design and monolithic realization of a novel fully soft-switched LED driver in GF 130nm BCDLite process. We achieve wide dimming range by operating at high switching frequencies, but the high switching does not compromise the power-efficiency. Using a fully soft-switching approach, the ensuing switching losses are negligible. This is achieved by a proposed Hysteretic Soft-Switching Controller (HSSC) and proposed circuitries, i.e., a voltage detector, current sensor, and a level shifter. The HSSC enables complete soft-switching, including zerovoltage switc...

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A 5.6 ppm/°C Temperature Coefficient, 87-dB PSRR, Sub-1-V Voltage Reference in 65-nm CMOS Exploiting the Zero-Temperature-Coefficient Point

Cited by 78 publications

References 26 publications

A Resistorless Voltage Reference with High-order Temperature Curvature Compensation in 55 nm CMOS Process

A Resistorless Voltage Reference with High-order Temperature Curvature Compensation in 55 nm CMOS Process

Design and realization of low dropout voltage regulator and voltage reference in deep-submicron CMOS for emerging Internet-of-Things and satellites

Design and realization of high-performance LED drivers for automotive lighting applications

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