A 6-bit 100-MS/s Fully-Digital Time-Based Analog-to-Digital Converter

Rivandi, Hassan; Shakibaee, Fatemeh; Saberi, Mehdi

doi:10.1109/iraniancee.2019.8786439

Cited by 9 publications

(5 citation statements)

References 7 publications

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“…9. Since linearity is the most important characteristic of time-based circuits [18], the delay transfer function of the proposed circuit was measured, Fig. 10.…”

Section: Measurements Resultsmentioning

confidence: 99%

A High-Frequency Beamforming Channel for Ultrasound Stimulation and Ultrasonic Powering

Rivandi

Ghosh

Costa

2022

2022 IEEE Biomedical Circuits and Systems Conference (BioCAS)

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New non-imaging ultrasound applications, such as ultrasound stimulation and ultrasonic power transfer, need submillimeter volumetric spatial resolution, electronically control of the focal spot location, high ultrasound intensity, and a tiny form factor. Satisfying these requirements demands a high-frequency phased array ultrasound transducer. On the other hand, the pitch size in a phased array must be half of the sound wavelength to avoid grating lobes in the ultrasound beam profile. In other words, higher frequency results in a smaller available area to implement a high-voltage electronics beamforming channel. While prior efforts have reached a maximum frequency of 8.3 MHz, this work utilizes a low area high-voltage level shifter coupled with optimum phase wrapping to present two 15 MHz and 12 MHz pixel-level pitch-matched beamforming channels that deliver 20 V and 36 V to the ultrasound transducer load, respectively. Furthermore, the phase of the output is programmable with 3bits resolution that allows fine control of focal spot location. The proposed beamforming channels have been implemented in 0.18µm BCD technology and consume 960 µA and 1.23 mA from 20 V and 36 V power supplies, respectively.

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“…9. Since linearity is the most important characteristic of time-based circuits [18], the delay transfer function of the proposed circuit was measured, Fig. 10.…”

Section: Measurements Resultsmentioning

confidence: 99%

A High-Frequency Beamforming Channel for Ultrasound Stimulation and Ultrasonic Powering

Rivandi

Ghosh

Costa

2022

2022 IEEE Biomedical Circuits and Systems Conference (BioCAS)

Self Cite

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“…A lot of research is done to improve the performance of the VTC circuit. Circuits in [16] and [26][27][28][29][30][31][32][33][34][35] are proposed to overcome the previously mentioned limitations of the conventional VTC circuit. In [16], a linearization circuit is proposed to achieve a maximum linearity error of 2%.…”

Section: Novel Trends and Future Workmentioning

confidence: 99%

“…In [34], although the proposed VTC achieves a better dynamic range of 400mV, the power consumption of this design is relatively high (3.35mW). In [35], a fully digital time-based ADC is proposed to reduce the chip area at which the power consumption is reduced to 380μW.…”

Section: Novel Trends and Future Workmentioning

confidence: 99%

A Survey on Analog-to-Digital Converters’ Architectures and Performance Analysis

Elgreatly¹,

Dessouki²,

Abdalla³

et al. 2021

Port-Said Engineering Research Journal

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Analog to digital converter (ADC) represents the link between the real world represented by real time analog signals and the digitized world represented by digital integrated circuits. The performance of the ADC depends on some important parameters such as resolution, sampling frequency, Signal-to-Noise Ratio (SNR), Power consumption and Figure- Of-Merit (FOM). This paper introduces a brief discussion of the most common ADC architectures. More detailed discussion on time-based ADCs is introduced and recent architectures introduced by researchers are presented and compared with each other in terms of linearity error, resolution, and power consumption. Moreover, a comparison survey is presented on the most popular commercial ADCs. The data used in the survey are taken for about 1500 commercial ADCs from major integrated circuits companies such as Texas Instruments and Analog Devices. The aim of this paper is to give a detailed comparison on the most common ADCs to help researches to choose the best architecture that fits their desired application and to draw researchers' attention towards time-based ADCs as they proved a promising performance improvements compared with other ADCs architectures in many applications such as software radio receivers.

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“…Many modified VTC circuits have been proposed by researchers [3][4][5][6][7][8][9][10][11][12] to overcome the previously mentioned drawbacks of the conventional VTC circuit. However, these circuits are not sufficiently linear and have low resolution.…”

Section: Introductionmentioning

confidence: 99%

“…In Reference [11], a modified VTC is introduced to increase the linearity but the power consumption of this design is high (3.35 mW), and the input dynamic range is limited to 400 mV. In Reference [12], a fully digital time-based ADC is proposed to reduce the chip area at which the power consumption is reduced to 380 µW but still relatively high.…”

Section: Introductionmentioning

confidence: 99%

A Novel Highly Linear Voltage-To-Time Converter (VTC) Circuit for Time-Based Analog-To-Digital Converters (ADC) Using Body Biasing

et al. 2020

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Time-based analog-to-digital converter is considered a crucial part in the design of software-defined radio receivers for its higher performance than other analog-to-digital converters in terms of operation speed, input dynamic range and power consumption. In this paper, two novel voltage-to-time converters are proposed at which the input voltage signal is connected to the body terminal of the starving transistor rather than its gate terminal. These novel converters exhibit better linearity, which is analytically proven in this paper. The maximum linearity error is reduced to 0.4%. In addition, the input dynamic range of these converters is increased to 800 mV for a supply voltage of 1.2 V by using industrial hardware-calibrated TSMC 65 nm CMOS technology. These novel designs consist of only a single inverter stage, which results in reducing the layout area and the power consumption. The overall power consumption is 18 μW for the first proposed circuit and 15 μW for the second proposed circuit. The novel converter circuits have a resolution of 5 bits and operate at a maximum clock frequency of 500 MHz.

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A 6-bit 100-MS/s Fully-Digital Time-Based Analog-to-Digital Converter

Cited by 9 publications

References 7 publications

A High-Frequency Beamforming Channel for Ultrasound Stimulation and Ultrasonic Powering

A High-Frequency Beamforming Channel for Ultrasound Stimulation and Ultrasonic Powering

A Survey on Analog-to-Digital Converters’ Architectures and Performance Analysis

A Novel Highly Linear Voltage-To-Time Converter (VTC) Circuit for Time-Based Analog-To-Digital Converters (ADC) Using Body Biasing

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