A 60nm NOR Flash Memory Cell Technology Utilizing Back Bias Assisted Band-to-Band Tunneling Induced Hot-Electron Injection (B4-Flash)

Shukuri, S.; Ajika, N.; Mihara, M.; Kobayashi, Kazuo; Endoh, T.; Nakashima, M.

doi:10.1109/vlsit.2006.1705194

Cited by 13 publications

(7 citation statements)

References 1 publication

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“…NAND Flash achieves high program speed of 10MB/s [1] among all Flash memories, which is 1/10 to that of HDD's, and conventional NOR Flash does much less. We proposed new program mechanism, B4-HE, and confirmed its high speed and highly efficient program properties, which showed the possibility to realize 100MB/s programmability [2]. In this paper, we implement B4-HE to floating-gate NOR type 4Mb Flash test chip and confirm 100MB/s program speed by utilizing novel DSLA and SVM to the chip.…”

Section: Introductionmentioning

confidence: 71%

A 1.8V 4Mb Floating-Gate NOR Type B4-Flash Test Chip for 100MB/s Programming Speed

Mihara¹,

Kawajiri²,

Kobayashi³

et al. 2007

2007 22nd IEEE Non-Volatile Semiconductor Memory Workshop

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A 1.8V 4Mb floating-gate Flash test chip utilizing Back Bias assisted Band-to-Band tunneling induced Hot Electron (B4-HE) injection mechanism (B4-Flash) has been fabricated. Double Source Line Architecture (DSLA) and Selective Verifying Method (SVM), applied to NOR arrayed B4-Flash enables to achieve 100MB/s programming speed. The MLC capability of B4-Flash memory is also shown by realizing three levels of programmed Vth distribution with 0.8V width.

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Section: Introductionmentioning

confidence: 71%

A 1.8V 4Mb Floating-Gate NOR Type B4-Flash Test Chip for 100MB/s Programming Speed

Mihara¹,

Kawajiri²,

Kobayashi³

et al. 2007

2007 22nd IEEE Non-Volatile Semiconductor Memory Workshop

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“…Thus B4-Flash can achieve fast erase capability equivalent to NAND with high speed programmability of 100MB/sec [8][9][10]. These features boost B4-Flash to be the best suited flash memory for next generation code storage applications such as those for mobile phones and automotives with high reliability.…”

Section: Discussionmentioning

confidence: 99%

“…In this paper, we investigate retention characteristics of the cycled B4-Flash memory [8]- [10] with statistics. A technique to pursue variation of intrinsic gm of the memory cell has been employed.…”

Section: Introductionmentioning

confidence: 99%

Advantage of Floating Gate B4-Flash over Retention Reliability after Cycling - Characterization by Variation of Transconductance

Shukuri¹,

Ajika²,

Shimizu³

et al. 2008

2008 Joint Non-Volatile Semiconductor Memory Workshop and International Conference on Memory Technology and Design

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This paper describes the reliability characteristics evaluation results of floating gate type B4-Flash (Back Bias assisted Band-to-Band tunneling induced Hot Electron injection Flash) with statistics. Data retention reliability of B4-Flash with N+gate and P-channel memory cell utilizing B4-HE program and FN channel erase is evaluated extensively under bake temperature of -24C to 250C up to 7000hrs after 1k to 1M E/W cycles, by novel evaluation method of correlating Vt shifts and gm variations. No leaky bit failure can be seen in B4-Flash with thicker than 9nm tunnel oxide and the Vt shifts during retention bake is associated with electron detrapping and move into floating gate from tunnel oxide, which is verified by correlating Vt shifts and gm variations. Tunnel oxide thickness dependence on retention reliability is also studied and confirmed to have excellent retention characteristics under 150C after 100k cycling. In the case of 7nm tunnel oxide thickness device, some leaky bits due to stress induced leakage current (SILC) can be seen even in B4-Flash, nevertheless number of tail bits is remarkably reduced compared with that of conventional N+gate, N-channel NOR flash. According to all the obtained results show that B4-Flash can achieve excellent retention reliability after cycling with high speed programmability.

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“…Since flash usually uses page/sector/block erasing mode, the erasing time of 100 ms does not significantly affect flash write speed. The programming speed of 10 μs and erasing speed of 100 ms of our 3D NOR devices are comparable to that of the 2D NOR Flash with single-crystal silicon channels [11], [20], [21], [22].…”

Section: Architecture and Process Methodsmentioning

confidence: 99%

A Novel 3D NOR Flash With Single-Crystal Silicon Channel: Devices, Integration, and Architecture

Huang

Zhu

et al. 2022

IEEE Electron Device Lett.

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A novel 3D NOR memory array with singlecrystal silicon channel, high-density and fast-read was proposed and fabricated. The proposed 3D NOR memory is investigated in terms of device structure, integration scheme, and circuit architecture. To obtain single-crystal silicon channel for 3D NOR, 1) vertical flash devices were presented, 2) a stack with multiple doped epitaxial Si layers was used for making the vertical devices, and 3) unlike 3D NAND, bit-line planes, source-line planes and vertical word-lines were utilized. Due to the use of single-crystal silicon channels, our memory devices have large read currents of 110 µA/µm. Through programming/erasing tests, the programming speed of 10 µs and erasing speed of 100 ms were obtained, which are comparable to that of the 2D NOR Flash with single-crystal silicon channels.

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A 60nm NOR Flash Memory Cell Technology Utilizing Back Bias Assisted Band-to-Band Tunneling Induced Hot-Electron Injection (B4-Flash)

Cited by 13 publications

References 1 publication

A 1.8V 4Mb Floating-Gate NOR Type B4-Flash Test Chip for 100MB/s Programming Speed

A 1.8V 4Mb Floating-Gate NOR Type B4-Flash Test Chip for 100MB/s Programming Speed

Advantage of Floating Gate B4-Flash over Retention Reliability after Cycling - Characterization by Variation of Transconductance

A Novel 3D NOR Flash With Single-Crystal Silicon Channel: Devices, Integration, and Architecture

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