2022 IEEE International Solid- State Circuits Conference (ISSCC) 2022
DOI: 10.1109/isscc42614.2022.9731750
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A 64Mpixel CMOS Image Sensor with 0.56μm Unit Pixels Separated by Front Deep-Trench Isolation

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Cited by 13 publications
(8 citation statements)
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“…However, the growing demand for high-quality and high-resolution images has placed pressure on image sensors to process higher-resolution images pushing toward a deep submicron-scale pixel pitch to augment the resolution. Nonetheless, as pixel size diminishes, the amount of photons that captured by the photodiode decreases in proportion to the square of the pixel size, making it more vulnerable to undesired noises (1,2). This can result in a considerable decrease in signal-to-noise ratio (SNR) especially in low-light conditions.…”
Section: Introductionmentioning
confidence: 99%
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“…However, the growing demand for high-quality and high-resolution images has placed pressure on image sensors to process higher-resolution images pushing toward a deep submicron-scale pixel pitch to augment the resolution. Nonetheless, as pixel size diminishes, the amount of photons that captured by the photodiode decreases in proportion to the square of the pixel size, making it more vulnerable to undesired noises (1,2). This can result in a considerable decrease in signal-to-noise ratio (SNR) especially in low-light conditions.…”
Section: Introductionmentioning
confidence: 99%
“…Although color routers have been designed using various methods, including spatial multiplexing (35), dispersion engineering (36,39), volumetric metaoptics (37,41), and genetic algorithms (40), these devices face challenges related to efficiency, low focusing quality, design degree of freedom, and fabrication difficulties. Highly integrated color image sensors, particularly those with deep submicron pixel sizes (1,2), require these nanophotonic solutions even more, but the design space becomes extremely small, making it challenging to solve the associated problems with these devices.…”
Section: Introductionmentioning
confidence: 99%
“…In the past 5 years, the pixel pitch of CMOS image sensors (CIS) has shrunk from 0.9 μm to 0.56 μm [ 1 , 2 , 3 , 4 , 5 , 6 , 7 , 8 , 9 , 10 , 11 , 12 , 13 , 14 , 15 , 16 ] at a fast pace of almost one generation every year. Despite the pixel design and process development effort to maintain the quantum efficiency (QE) and the full well capacity (FWC) at comparable levels across the generations, the smaller pixels still face the fundamental physical challenge: under a given scene illumination and integration time, the number of photons that can be captured by smaller pixels is inevitably less.…”
Section: Introductionmentioning
confidence: 99%
“…In general, the known RN consists of the thermal noise, the flicker (1/f) noise, and the random telegraph noise (RTN). Although a median readout noise of 1 e-rms or less can be achieved by careful circuit design, the RTN on the noise distribution tail, typically dominated by the pixel source followers, could be more than 10 times higher than the median or average noise [ 1 , 2 , 3 , 10 , 17 , 18 , 19 , 20 , 21 , 22 ]. Therefore, understanding and reducing RTN are especially critical to achieving high dynamic range and good image quality for CIS products.…”
Section: Introductionmentioning
confidence: 99%
“…Complimentary metal–oxide–semiconductor (CMOS) active pixel sensors (APS) with at least four transistors per pixel are currently the technology of choice for consumer electronics as well as scientific applications and emerging 3D imaging for specific use cases [ 1 , 2 , 3 , 4 , 5 , 6 , 7 , 8 , 9 , 10 , 11 , 12 , 13 , 14 , 15 , 16 ]. CMOS APS architecture may vary between different designs tailored to specific applications.…”
Section: Introductionmentioning
confidence: 99%