A 65 nm linear broad-band differential Low Noise Amplifier using post distortion technique

Zokaei, Abolfazl; Amirabadi, Amir

doi:10.1016/j.mejo.2018.01.007

Cited by 15 publications

(7 citation statements)

References 18 publications

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“…The LNA achieves a peak gain of 9.94 dB and minimum NF of 1.086 dB in Mode-I. The proposed LNA provides the best noise performance when compared with the LNAs reported in [22][23][24][25][26][27][28][29][30][31][32][33][34][36][37][38][39][40][41][42][43][44][45][46][47]. The linearity performance of the LNA is characterized using a two-tone test.…”

Section: Resultsmentioning

confidence: 99%

“…Then, the input-referred third-order intercept point (IIP3) is derived in [69] regarding voltage (V) as where, From (30), it can be seen that mobility degradation and velocity saturation plays a vital role in the linearity performance of deep-submicron RF circuits such as LNA. From (31), IIP3 in short channel devices can be improved by operating the device in the subthreshold region.…”

Section: Distortion Analysismentioning

confidence: 99%

“…The common-gate (CG) based LNAs, and resistive load based LNAs are also ideal candidates for wideband LNA designs. Some of the recently proposed UWB LNA designs are reported in [17][18][19][20][21][22][23][24][25][26][27][28][29][30]. Cross-coupled and body driven techniques are exploited in [17], for operating at a reduced supply voltage, current reuse and forward body bias techniques are used in [18].…”

Section: Introductionmentioning

confidence: 99%

“…Noise-cancelling LNA topologies with current reuse techniques is reported in [27,28]. Recently, in [29], peaking inductors between the stages of the cascade LNA is used for wideband performance, and in [30] linearity improvement for UWB LNA with post-distortion technique is proposed. The high voltage gains reported in [25][26][27][28] will cause dynamic range reduction due to blocker effect, and the receiver output will be distorted resulting in lossy demodulation.…”

Section: Introductionmentioning

confidence: 99%

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An ultra-low-power low-noise amplifier using cross-coupled positive feedback for 5G IoT applications

2019

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The wireless communication in the next generation is bound to be driven by massive machine-type communication or in other words Internet-of-things (IoT). In the near future, the need for effective communication and higher data processing rates will require IoT devices to support 5G networks. For 5G IoT applications in the ultra-wideband range (3.1-10.6 GHz), the analog receivers must provide both high-performance and energy efficiency simultaneously. This work addresses the demands of 5G IoT analog receivers by proposing an ultra-low-power low noise amplifier (LNA) employing cross-coupled positive shunt feedback. The proposed LNA is designed in UMC 180 nm deep n-well process, and the post-layout characterization is done using Cadence SpectreRF. The proposed design achieves a peak gain of 9.94 dB and a noise figure of 3.2-1.086 dB along the usable bandwidth of 3.2-9.625 GHz while consuming an ultra-low-power of 493 µW from a 1-V power supply. The maximum input-referred third-order intercept point of 8.81 dBm is attained for an input signal at 2.4 GHz and the interferer as close as 2.425 GHz. The LNA consumes a minimal layout area of only 676.2 µm × 350.7 µm. The proposed LNA has the better figure-of-merit while consuming almost 50% less power than the recently reported sub-mW LNA in literature.

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Section: Resultsmentioning

confidence: 99%

Section: Distortion Analysismentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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An ultra-low-power low-noise amplifier using cross-coupled positive feedback for 5G IoT applications

2019

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“…Even though single-end LNA input stage consumes less power and the active chip area consumption is minimum, differential topology is preferred for the following important issues [1]. Since the noise figure is the critical factor for the LNA, by using differential signalling can offer better noise performance due to the ability of rejecting the common-mode noise.…”

Section: Introductionmentioning

confidence: 99%

Linearity improvement of differential CMOS low noise amplifier

Muhamad

Soin

Ramiah

2019

IJEECS

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This paper presents the linearity improvement of differential CMOS low noise amplifier integrated circuit using 0.13um CMOS technology. In this study, inductively degenerated common source topology is adopted for wireless LAN application. The linearity of the single-ended LNA was improved by using differential structures with optimum biasing technique. This technique achieved better LNA and linearity performance compare with single-ended structure. Simulation was made by using the cadence spectre RF tool. Consuming 5.8mA current at 1.2V supply voltage, the designed LNA exhibits S21 gain of 18.56 dB, noise figure (NF) of 1.85 dB, S11 of −27.63 dB, S22 of -34.33 dB, S12 of −37.09 dB and IIP3 of -7.79 dBm.

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A 10‐mW 3.9‐dB NF transformer‐based V‐band low‐noise amplifier in 65‐nm CMOS

Zhao

et al. 2019

Int J Numerical Modelling

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A V-band low-noise amplifier (LNA) employing a Gm-boosting technique is presented in this paper. With the transformers, which are applied between the adjacent stages, the transconductances of the following transistors are boosted. Thus, the gain of the circuit is effectively enhanced. The noise figure (NF) is also decreased with the technique. Utilizing a commercial 65-nm CMOS technology, the LNA is demonstrated. The measurement results show that the LNA achieves a maximum gain of 17.4 dB at 57.1 GHz with 10.9-GHz 3-dB gain bandwidth. The measured NF of the LNA is from 3.95 dB to 4.6 dB at 53 to 64 GHz. The tested input 1-dB gain compression point (IP 1dB ) is −14.2 dBm at 57 GHz. The DC power consumption is only 10 mW with 1-V power supply. The chip area is only 0.255 mm 2 with all testing pads.

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A 65 nm linear broad-band differential Low Noise Amplifier using post distortion technique

Cited by 15 publications

References 18 publications

An ultra-low-power low-noise amplifier using cross-coupled positive feedback for 5G IoT applications

An ultra-low-power low-noise amplifier using cross-coupled positive feedback for 5G IoT applications

Linearity improvement of differential CMOS low noise amplifier

A 10‐mW 3.9‐dB NF transformer‐based V‐band low‐noise amplifier in 65‐nm CMOS

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A 65 nm linear broad-band differential Low Noise Amplifier using post distortion technique

Cited by 15 publications

References 18 publications

An ultra-low-power low-noise amplifier using cross-coupled positive feedback for 5G IoT applications

An ultra-low-power low-noise amplifier using cross-coupled positive feedback for 5G IoT applications

Linearity improvement of differential CMOS low noise amplifier

A 10‐mW 3.9‐dB NF transformer‐based V‐band low‐noise amplifier in 65‐nm CMOS

Contact Info

Product

Resources

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A 65 nm linear broad-band differential Low Noise Amplifier using post distortion technique