A 6b stochastic flash analog-to-digital converter without calibration or reference ladder

A subsampling stochastic coarse-fine ADC with SNR 55.3dB and >5.8TS/s effective sample rate for an on-chip signal analyzer

“…3) The constraint for overlapping the means of two CGs by a standard deviation, σ VOS suggested in previous work essentially is not required [5]. We present results documenting these advancements before concluding the paper.…”

“…To extend the linear region around µ VOS , it is possible to sum two groups that are close together as in [5]:…”

“…The sampling clock was set to f s = 23MHz, with coherent equivalent time sampling factors k = 1 and R varied from 320 to 10000, and L set to 32 or 64 voltage reference levels. The input sine wave frequency was decided by the coherent sampling scaling factor from equation (5). Individual levels when summed reconstruct the signal shown in figure 9a for f in = 23.0023 MHz and R = 10000 for an effective sampling frequency f s,ef f = 230.023 GS/s.…”

“…al. used purely stochastic methods to implement an ADC in [5]. Pure stochastic mixed-signal design has the ability to achieve higher accuracy as the number of stochastic measurement elements increases, however such methods currently are limited to a small dynamic range with a large number of comparators.…”

“…The most widely used application at the time of writing is, arguably, the stochastic time-to-digital converter (sTDC) [1], [2], [3], [4]. Stochastic methods have also been used to implement analog-to-digital converters as well [5], [6]. Weaver et.…”