A 77-GHz High Gain Low Noise Receiver for Automatic Radar Applications

Abstract

In this paper, a high gain 77-GHz receiver with a low noise figure (NF) was designed and implemented in a 40-nm CMOS process. With the purpose of making better use of active devices, an extra inductor, Ld, is adopted in the new neutralization technique. The three-stage differential low noise amplifier (LNA) using the proposed technique improves the voltage gain and reduces the NF. The receiver design utilizes an active double-balanced Gilbert mixer with a transformer coupling network between the transconductance stage and the switch stage. The flicker noise contribution from the switch MOS transistors is largely reduced due to the low DC current of the switch pairs. The LO signal is provided by an on-chip fundamental voltage-controlled oscillator (VCO) with a tuning range from 70.5 to 78.1 GHz. A conversion gain of 32 dB and a NF of 11.86 dB are achieved at 77 GHz by the designed receiver. The LNA as well as the mixer consume a total DC power of 33.2 mW and occupy a core size of 1 × 0.38 mm2.

Design and Performance Analysis of W-Band Low Noise Amplifier for RFIC-5G Mobile Systems

“…Besides, the input/output matching networks, device parameters, LC components, and biasing points have been designed to get the e ective results. us, the proposed ampli er is designed with standard microelectronic procedures for low cost, all with the aim of achieving a good performance compared to prior research exposed in [3,4,11,13,14,24,25], as summarized in Subsection 5.4 of this manuscript.…”