A 7L and 11L High Step-Up SCMLI Topology With Reduced Component Voltage Stress

Ali, Jagabar Sathik Mohamed; Khan, Amjad Rehman; Pandurangan, Gopinath Narayanan; Ponnusamy, Prem; Alamri, Faten S.; Bahaj, Saeed Ali

doi:10.1109/access.2023.3333363

Cited by 2 publications

(3 citation statements)

References 42 publications

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“…This proposed MLI can generate 15-level output voltage with three input sources of ratios 1:2:4 with best possible switching combinations shown in Table 1. The MLI topology requires ten power devices which for developing the aforementioned voltage level without clamping diode and capacitors [8]. The output voltage level of the conventional reduced MLI [21] and the proposed modified reduced MLI voltage level is expressed in below equations.…”

Section: A Switching Strategy and Circuit Operationmentioning

confidence: 99%

“…Some literature [5], [6], and [7] proposes reduced switch MLIs as a way to get a magnified output voltage waveform with fewer switching devices, minimum switching loss, and low standing voltage. A high step up capacitor based MLI with the fewest number of devices has been presented by [8] to obtain lower total standing voltage or to achieve lowest voltage stress.…”

Section: Introductionmentioning

confidence: 99%

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Modified Asymmetrical H-Bridge MLI With Minimum Switching Loss and Harmonic Distortion Using JAYA Algorithm

Mohanty,

Mohanty

2024

IEEE Access

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This paper proposes a modified structure of reduced switch count H-Bridge Multilevel inverter (MLI) which comes with an advantages of higher voltage level, lower switching loss and lower number of components. This developed topology of MLI can generate 15-level output voltage with only three number of DC voltage sources and ten power devices. In order to generate the higher voltage level in analogy to the conventional Multilevel inverter asymmetrical input voltage sources are used which reduced the number of power devices input voltage sources and driver circuits. To mitigate the voltage and current harmonics from the output of the MLI JAYA algorithm is employed. This algorithm resulted 2.5% total harmonic distortion (THD) for three phase system and 5.2% THD for single phase system by developing suitable switching angles with rapid acceleration and reduces the computational burden. The efficacy of the algorithm has been justified by the comparison study with most popular swarm based algorithms known as particle swarm optimization (PSO) and Genetic algorithm (GA). The performance of the reduced MLI has been studied by developing a prototype for single phase and three phase in both MATLAB Simulink environment and experimental setup.

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Section: A Switching Strategy and Circuit Operationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Modified Asymmetrical H-Bridge MLI With Minimum Switching Loss and Harmonic Distortion Using JAYA Algorithm

Mohanty,

Mohanty

2024

IEEE Access

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“…However, multilevel inverters come with drawbacks such as the requirement for numerous switching elements and the potential for voltage and power imbalances [16][17][18]. Multilevel inverter families are typically classified into four main categories based on voltage sources: capacitor-clamped, neutral point-clamped (diode-clamped), cascaded, and hybrid multilevel inverters [19,20].…”

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confidence: 99%

Performance Analysis of Modulation Strategies in Single-Phase HBNPC Inverter Across Variable Operating Conditions

Cavli,

Ozkop

2024

IEEE Access

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This study investigates the performance of a single-phase 5-level H-Bridge Neutral Point Clamped (HBNPC) inverter across various operating conditions. These conditions encompass variations in output power, frequency, modulation index, and modulation techniques. To adapt modulation strategies typically employed in 3-phase inverter structures, we apply them to a single-phase HBNPC inverter. The modulation strategies under consideration include level-shifted (LS) based on phase disposition pulse width modulation (PD-PWM), third harmonic injection pulse width modulation (THI-PWM), space vector pulse width modulation (SV-PWM), and modified PWM (MPWM). These strategies are developed using different types of reference signals (RS) and carrier signals (CS). Initially, we analyze the inverter's output voltage and current waveforms across various modulation strategy states. Subsequently, we explore the relationships between efficiency, total harmonic distortion (THD), and variable output power across different modulation strategy states. We uncover distinct patterns between modulation strategy-THD, efficiency, and output voltage for maximum inverter output power. Furthermore, we examine the relationship between the modulation index and THD for each modulation strategy state, considering different switching frequencies. Additionally, we investigate the relationship between switching frequency and THD across different modulation index values, approaching the analysis from multiple perspectives. INDEX TERMS Multilevel inverter, modulation technique, carrier signal, HBNPC I. INTRODUCTION

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A 7L and 11L High Step-Up SCMLI Topology With Reduced Component Voltage Stress

Cited by 2 publications

References 42 publications

Modified Asymmetrical H-Bridge MLI With Minimum Switching Loss and Harmonic Distortion Using JAYA Algorithm

Modified Asymmetrical H-Bridge MLI With Minimum Switching Loss and Harmonic Distortion Using JAYA Algorithm

Performance Analysis of Modulation Strategies in Single-Phase HBNPC Inverter Across Variable Operating Conditions

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