A 9-mm<sup>2</sup> Ultra-Low-Power Highly Integrated 28-nm CMOS SoC for Internet of Things

Pu, Yu; Shi, Chunlei; Samson, G.; Park, Dongkyu; Easton, Ken; Beraha, Rudy; Newham, Adam; Lin, Mark; Rangan, Venkat; Chatha, Karam S.; Butterfield, D.; Attar, Rashid

doi:10.1109/jssc.2017.2783680

Cited by 53 publications

(27 citation statements)

References 9 publications

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“…But developing a programmable architecture that is compatible with the ultra-low power (ULP) consumption required by LPWA applications is a major challenge. Luckily, both CMOS scaling and the current trend towards heterogeneous, multi-core IoT platforms can help to address this challenge [3]- [5]. In addition, recent research has proposed specialized architectures to address this challenge [6], [7].…”

Section: Introductionmentioning

confidence: 99%

Software-Hardware Co-Design of Multi-Standard Digital Baseband Processor for IoT

Amor

Bernier

2019

2019 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

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This work demonstrates an ultra-low power, software-defined wireless transceiver designed for IoT applications using an open-source 32-bit RISC-V core. The key driver behind this success is an optimized hardware/software partitioning of the receiver's digital signal processing operators. We benchmarked our architecture on an algorithm for the detection of FSK-modulated frames using a RISC-V compatible core and ARM Cortex-M series processors. We use only standard compilation tools and no assembly-level optimizations. Our results show that Bluetooth LE frames can be detected with an estimated peak core power consumption of 1.6 mW on a 28 nm FDSOI technology, and falling to less than 0.6 mW (on average) during symbol demodulation. This is achieved at nominal voltage. Compared to state of the art, our work offers a power efficient alternative to the design of dedicated baseband processors for ultra-low power software-defined radios with a low software complexity.

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Section: Introductionmentioning

confidence: 99%

Software-Hardware Co-Design of Multi-Standard Digital Baseband Processor for IoT

Amor

Bernier

2019

2019 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

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“…To realize this approach, we focused on NoC, an IP commonly found in embedded system platforms, and propose to embed an MMU into NoC. NoC plays an important role in supporting concurrent communication on embedded system platforms [8], [27], [28]. In state-of-the-art embedded systems, NoC has become one of the most popular system interconnect IPs owing to its ability to overcome the limitations of the conventional bus-based system interconnects (e.g., unbearable increasing density and complexity induced by the system interconnect) [29]- [31].…”

Section: A Proposed Approachmentioning

confidence: 99%

“…The associate editor coordinating the review of this manuscript and approving it for publication was Adnan M. Abu-Mahfouz. researched and developed from both academia [4]- [8] and industry [9]- [12]. In this paper, we call such small embedded systems using the ULP lightweight processors the lightweight embedded systems, and research on their design methodologies.…”

Section: Introductionmentioning

confidence: 99%

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MMNoC: Embedding Memory Management Units into Network-on-Chip for Lightweight Embedded Systems

et al. 2019

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With the advent of the Internet-of-Things (IoT) era, the demand for lightweight embedded systems is rapidly increasing. So far, ultra-low power (ULP) processors have been leading the development of lightweight embedded systems. However, as the IoT era gets more sophisticated, existing ULP processors are expected to reach a critical limit in the absence of a memory management unit (MMU) in that multiple programs cannot be run in the MMU-less embedded systems. To tackle this issue, we propose an architecture in which the MMU is embedded in a network-on-chip (NoC). Through the proposed approach, NoC offers MMU functionality without modifying the processor design, allowing developers to easily leverage the existing ULP lightweight processors and build embedded systems that support multiprocessing. In this paper, along with the details of the proposed MMU-embedded NoC (MMNoC) design, a prototype platform including the MMNoC and dual RISC-V processors is provided. The prototype platform is synthesized with FPGA and Samsung 28 nm FD-SOI technology to verify the functional accuracy and small performance, area, and power overhead of the MMNoC. INDEX TERMS Network-on-chip, NoC, memory management unit, MMU, embedded system.

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“…Circuitry reported in literature that can potentially benefit from RFEH include low power sensors such as [2] and SRAM devices [3] which operate at sub-threshold or near threshold are the perfect candidate for RFEH systems. In order to power up low power devices through RFEH, a power management system such as the one shown in Figure 1 can be employed.…”

Section: Introductionmentioning

confidence: 99%

-81dB PSRR regulated cascode fully MOS bandgap reference for power management in RF energy harvesting systems

K.Zulkalnain

Kamsani

Sidek

et al. 2019

IJEECS

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In the midst of technological advance where everything is connected via the internet, IoT is emerging as a potential solution to everything, ranging from health wearables to smart city. An RFEH power management system has promising benefits that could further improve the powering of IoT devices as it has potential for clean energy as well as other advantages which consists of a rectifier, bandgap reference and LDO as the main core. However, the main challenge is supplying clean and low noise power to sensitive circuits such as low power sensors, VCOs and PLLs. A high PSRR bandgap reference that rejects noise at the power supply is needed so that the circuitry powered by RFEH systems would be able to function properly. This paper presents a bandgap with MOS PTAT and CTAT extraction achieving a PSRR of -81dB at a V<sub>ref</sub> of 0.415V was designed on 130nm CMOS technology targeting IoT RFEH devices that operate at sub-threshold and near-threshold region that exhibits improvement over the base design.

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A 9-mm² Ultra-Low-Power Highly Integrated 28-nm CMOS SoC for Internet of Things

Cited by 53 publications

References 9 publications

Software-Hardware Co-Design of Multi-Standard Digital Baseband Processor for IoT

Software-Hardware Co-Design of Multi-Standard Digital Baseband Processor for IoT

MMNoC: Embedding Memory Management Units into Network-on-Chip for Lightweight Embedded Systems

-81dB PSRR regulated cascode fully MOS bandgap reference for power management in RF energy harvesting systems

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A 9-mm2 Ultra-Low-Power Highly Integrated 28-nm CMOS SoC for Internet of Things

Cited by 53 publications

References 9 publications

Software-Hardware Co-Design of Multi-Standard Digital Baseband Processor for IoT

Software-Hardware Co-Design of Multi-Standard Digital Baseband Processor for IoT

MMNoC: Embedding Memory Management Units into Network-on-Chip for Lightweight Embedded Systems

-81dB PSRR regulated cascode fully MOS bandgap reference for power management in RF energy harvesting systems

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A 9-mm² Ultra-Low-Power Highly Integrated 28-nm CMOS SoC for Internet of Things