A 90 nm CMOS 15/60 GHz frequency quadrupler

Abstract

The design and characterisation of a 60 GHz frequency quadrupler implemented in a conventional 90 nm CMOS technology is presented. The proposed fully differential frequency quadrupler is formed by properly combining a 15 GHz to 30 GHz doubler, two 30 GHz amplifiers, a polyphase filter, a 30 to 60 GHz doubler and two 60 GHz amplifiers. The proposed design is based on a differential architecture and achieves enhanced characteristics in terms of harmonics rejection, bandwidth, power consumption and die area. Conversion loss of 9.3 dBm at 60 GHz with 1.1 dBm input power is achieved. The 3 dB bandwidth lies between 51.5 GHz and 61 GHz, while the total current consumption is 100 mA from a 1.2 V supply voltage for the fully balanced implementation.

Analysis and Design of a GaAs Monolithic Tunable Polyphase Filter in S/C Bands

“…The physical layout can be considered as a design requirement as will be described in this paper. APPF have been implemented in CMOS technology, [12][13][14] but until now never in GaAs technology. The range 1-5GHz is easily covered in CMOS technology which is inexpensive and the circuit can be included on the same die with other blocks.…”

Indoor precise positioning algorithm using 60GHz pulse based on compressive sensing

“…In recent years, many foreign academic communities and enterprise alliances were opened for the research of the 60GHz pulse wireless communication technology. But the research is mainly focused on the design of transceiver [16,18,21], the establishment of channel model [2,9], the standards the physical layer and MAC layer of communication [10], the transceiver antenna beam shaping [12,13,26] and so on. Currently, the research of the 60GHz pulse positioning is still relatively deficient, and lack of an integral theoretical system.…”