A 900 MHz integrated discrete-time filtering RF front-end

System design of bandpass sampling RF receivers

“…In [3], BPS is applied at the IF frequency (fs=f IF ), whereas [4] applies BPS directly at RF (fs=f RF ). In [5], the input RF signal is sub-sampled with fs=f RF /12. In the three previous examples, the sampling process is used to downconvert the signal to a low or Zero IF.…”

An RF sub-sampling mixer, PGA and ΣΔ ADC for conversion at 900 MHz

“…For a simple low power sub-sampling mixer, a V max of 10 mV can be achieved [4]. The sub-sampling mixer should have a dynamic range similar to that of the ADC, which is targetted as a minimum of 50 dB.…”

“…A major limitation of previous implementations is the RF isolation when the sampling switch is turned off [4]. To overcome this limitation, a second sampling switch is added to provide feed forward input cancellation during hold mode as shown in Figure 3.…”

“…For sub-sampling mixers with high frequency inputs, the hold mode input isolation is further reduced by the parasitic components between the inputs and hold capacitor(s). This is a particularly difficult problem for subsampling mixers used for RF and high IF sampling in wireless receivers [4]. This paper uses a novel circuit for RF sub-sampling that provides increased RF isolation while providing good dynamic range and low power consumption.…”

Implementation and performance of a low-power multirate PSK receiver robust to doppler shift

“…The new SNR for the subsampled signal becomes degraded by the overlapped out-ofband noise, and is thus Another issue associated with subsampling frontend is its sensitivity to the jitter due to sampling clock. The aperture jitter on the sampling clock results in phase noise and its spectral density is amplified by M 2 [15]. If a 435 MHz signal is sampled with a 4 MHz clock, there will be a 40 dB increase in the phase noise.…”