A Biquadratic Cell Based on the Flipped-Source-Follower Circuit

Matteis, M. De; Baschirotto, A.

doi:10.1109/tcsii.2016.2611061

Cited by 38 publications

(33 citation statements)

References 19 publications

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“…For these reasons, SF filters are often implemented in old CMOS processes (as 0.18 µm in [3][4][5][6]) and practically always adopt pseudo-differential topologies. This choice allows enhancing the output voltage headroom by avoiding the overdrive voltage required by the current tail used in a differential stage.…”

Section: Filter Corementioning

confidence: 99%

“…Starting from these base considerations, several papers have advanced the SF concept proposing very efficient CMOS SF analogue filters complying with the stringent requirements of the telecommunications systems [3][4][5][6]. Fig.…”

Section: Introductionmentioning

confidence: 99%

“…The low V DD -V TH (supply and threshold voltages, respectively) forces to significantly modify the classical FSF biquadratic cell (already presented in [4][5][6]) by inserting an additional PMOS transistor operating as a level-shifter. This also changes both open and closed-loop gains of the classical FSF filter topology [4][5][6] forcing specific circuital techniques able to restabilise the secondorder transfer function.…”

Section: Introductionmentioning

confidence: 99%

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Fully‐differential flipped‐source‐follower low‐pass analogue filter in CMOS 28 nm bulk

Matteis

Mangiagalli

Baschirotto

2018

IET Circuits, Devices & Systems

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This study presents a novel low-pass continuous-time filter based on the voltage flipped-source-follower (SF). The filter efficiently operates in CMOS 28 nm and improves the SF filters state-of-the-art thanks to a dedicated circuit that operates in fully-differential fashion (instead of the pseudo-differential typically used in state-of-the-art SF filters) with a dedicated Common-Mode-Feedback circuit. Thus this work extends the application of the SF filtering stages to the nm-range technologies where threshold voltage (V TH) is only two times lower than the supply voltage (V DD) for what regards standard-process MOS transistors. In order to validate the design concept, the proposed filter has been designed in CMOS 28 nm technology. Extensive simulation results of a 131 MHz −3 dB frequency proof-of-concept second-order filter are proposed. The device consumes 510 µW power from a single 1 V supply-voltage. In-band integrated noise is 160 µV RMS and IIP3 is 19 dBm for 20 and 21 MHz input tones frequencies. Simulation results lead to 166 J −1 figure-of-merit, outperforming the analogue filter stateof-the-art.

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Section: Filter Corementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Fully‐differential flipped‐source‐follower low‐pass analogue filter in CMOS 28 nm bulk

Matteis

Mangiagalli

Baschirotto

2018

IET Circuits, Devices & Systems

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“…In this section, we will discuss the limitations offered by the conventional buffers in the literature. The basic buffers include SF or super SF (SSF) which has been used to implement SFB biquad [6][7][8][9][10][11][12][13]. We will discuss two key points which greatly influence the performance of the SFB biquad.…”

Section: Source Followermentioning

confidence: 99%

“…So lower transistor stack with minimum number of signal carrying branches are preferred over the complex circuitries involving multiple signal paths which may create potential problems like: increase in number of high impedance nodes, high noise level, high supply voltage requirement, increase in power dissipation and so on. Recent works [6][7][8][9][10][11][12][13] describe an alternative approach based on source follower based (SFB) biquad for implementing continuoustime filters, which maximises the power efficiency while offering a low level of non-linearity. The application of these SFB-based filters is also extended for low-power biomedical applications [14][15][16].…”

Section: Introductionmentioning

confidence: 99%

1.2 V, 12.5 MHz fourth‐order low‐pass filter with 83 dB stopband attenuation using low output impedance source follower in 45 nm CMOS

Panigrahi

Parhi²

2018

IET Circuits, Devices & Systems

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A source follower with improved output resistance is proposed. This improvement is achieved using shunt-shunt feedback with the help of a voltage combiner in the feedback loop which helps not only enhancing the gain but achieving reduced distortion due to improved isolation. A high-performance Sallen-Key biquad is implemented using this improved source follower and two capacitors which offer 29.3 MHz of bandwidth and almost 50 dB of stopband attenuation with the power of 2.3 mW. A fourth-order Chebyshev low-pass filter prototype is designed with a cascade of two such biquads in 45 nm complementary metal-oxide-semiconductor (CMOS). A cutoff frequency of 12.4 MHz is obtained with a stopband rejection of more than 83 dB. The power dissipation of the filter is 5.1 mW, at 1.2 V supply, and achieves an in-band third-order intercept point of +26.8 dBm. The in-band input-referred noise is 3.4(uV/ Hz), resulting in a dynamic range of 78.1 dB.

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A current‐mode MOSFET‐C analog filter for the high‐frequency band applications

Ozenli

Yeşil

Kuntman

2021

Circuit Theory & Apps

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Summary In this work, a novel current‐mode filter is presented including a PMOS grounded capacitor and a metal insulator metal structure (MIM‐cap). Proposed filter's cut‐off frequency can be easily adjusted from 10 up to 35 MHz. The wide tuning range of the proposed filter is designed to cover the need of baseband filter in the high‐frequency band and wireless applications such as CDMA, IEEE802.11a/g, IEEE 802.11b, and IEEE 802.11n. In addition, the proposed filter is designed by using a design methodology employing polynomial regressive models of small signal parameters of transistors to provide design accuracy as high as possible. Designed filter structure has layout with 52.1 μm × 62.6 μm chip area, and post‐layout simulations are given extensively to prove performance of the filter. Furthermore, 1‐dB compression point and IIP3 analyses are highlighted to observe linearity of band‐pass output of the filter structure. Also, input‐referred noise characteristics of the filter outputs are investigated to overcome thermal noise effects worsening the performance for a wide range of operating frequency interval. Provided results show that the proposed filter scheme brings a promising opportunity to designers for the high‐frequency region operations.

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A Biquadratic Cell Based on the Flipped-Source-Follower Circuit

Cited by 38 publications

References 19 publications

Fully‐differential flipped‐source‐follower low‐pass analogue filter in CMOS 28 nm bulk

Fully‐differential flipped‐source‐follower low‐pass analogue filter in CMOS 28 nm bulk

1.2 V, 12.5 MHz fourth‐order low‐pass filter with 83 dB stopband attenuation using low output impedance source follower in 45 nm CMOS

A current‐mode MOSFET‐C analog filter for the high‐frequency band applications

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