A burst-mode clock and data recovery circuit with two symmetric quadrature VCO’s

Abstract

This paper presents a burst-mode clock and data recovery (CDR) circuit based on two symmetric quadrature phase VCO's. The reduced loop locking time of less than 5 bits was achieved without any extra delay circuits which are added in conventional schemes for timing control. The proposed circuit is designed in 350 nm CMOS process and its feasibility has been proved successfully operating at 1.25 Gb/s.

A low power wide tuning range two stage ring VCO with frequency enhancing

“…Voltage controlled oscillator (VCO) is an essential component in modern integrated circuit, such as radio-frequency (RF) transceivers [1,2,3,4,5,6,7,8] and clock data recovery (CDR) systems [9,10,11,12,13,14,15,16,17]. LC VCO has much better jitter performance but limit tuning range.…”