A Cache Design for a Security Architecture for Microprocessors (SAM)

A New Encryption and Hashing Scheme for the Security Architecture for Microprocessors

“…The next paragraphs are providing a brief description of SAM's main attributes. A more detailed architectural description can be found in [2] and the design of the caches in [3].…”

“…In this section, we first revisit the hashing scheme and data encryption proposed in [2,3], describing some weaknesses in security and performance. Then we propose some modifications on both the hashing and encryption schemes which improve the performance and strengthen the security.…”

“…The uppermost level is called the root hash and consists only of one hash value, which protects the last four hash values, and it is stored permanently inside the processor. See [2,3] for more details. Data encryption.…”

“…These schemes must provide a strong protection without requiring too many changes from the programmers point of view to be able to reuse existing code. Some processor extensions, like AEGIS [1] and SAM [2,3], have been built to provide a secure execution environment for programs. Using these extensions, a program can be protected to prevent program code and data based attacks as well as runtime attacks.…”

An Operating System Design for the Security Architecture for Microprocessors

“…Ideally, these schemes should provide a strong protection while keeping to a minimum the number of required modifications at the software layer (both operating system and user applications), and in the hardware layer as well. Some processor extensions, such as AEGIS [1] and SAM [2,3], have been so far proposed, providing a secure execution environment for programs. A program running inside a secure execution environment is safe against both software attacks (originating, for example, from a system administrator or even from a malicious kernel) and hardware attacks (for example, hardware supported sniffing on memory bus to bypass operating system protections).…”