A Carrier-Based PWM Technique for Capacitor Voltage Balancing of Single-Phase Three-Level Neutral-Point-Clamped Converters

Abstract

In this paper is presented a pulse-width-modulation (PWM) technique with neutral point capacitor voltage balancing in single-phase neutral-point-clamped (NPC) converters. The technique is based on the injection of a common mode voltage signal into the sinusoidal modulating signals of the conventional carrier-based PWM. Although several strategies have been reported for such a problem by using the voltage signal injection, the proposed method is very simple with easy implementation. It is presented a set of equations to demonstrate how the injected voltage signal introduces a dc component on the neutral-point current, which can be controlled in order to allow the capacitors voltages balancing.

A Harmonic Voltage Injection Based DC-Link Imbalance Compensation Technique for Single-Phase Three-Level Neutral-Point-Clamped (NPC) Inverters

“…In addition, these simulations and experiments were done in a single-phase NPC circuit structure with an additional resistive load circuit on top of the dc-link capacitor, as shown in Figure 2. The proposed dc-link capacitor voltage balancing control and the conventional method were carried out in a PSIM simulation, and the simulation scheme is shown in Figure 7 The maximum and minimum values obtained from the previous equations were determined by the voltage difference K and modulation index m. With the same modulation index m, the offset voltage injection method with distribution factor µ could be adopted for the full range of capacitor voltage difference such as from 0 V to V DC , but there were voltage oscillations on the dc-link voltage when the balancing control was adopted [15]. In contrast, the offset voltage injection method with the second-order harmonic component or the half-wave rectified can be adopted for smooth control.…”

“…In this case, the pole voltage reference always satisfies the range of the pole voltage (Equation (9)). Figure 4b shows the synthesized pole voltage reference where this method was proposed in [15]. In this case, the offset voltage was composed of distribution factor μ and the absolute value of the phase voltage reference.…”

“…This voltage imbalance harms the stability of the system, and limits the switching operation of the power stage [8][9][10][11]. In order to mitigate the voltage imbalance, many strategies that are based on additional hardware configurations or control algorithms have been proposed, hardware configurations or control algorithms have been proposed, and have been successfully adapted in some applications [12][13][14][15][16][17][18][19][20][21][22][23][24][25]. In [12,13], additional circuits for dc-link balancing were proposed.…”

“…Although these methods achieved the dc-link voltage balancing successfully, the increase in the cost and the losses were major defects. To avoid these disadvantages, several modulation techniques for single-phase three-level NPC inverters have been presented in [14][15][16][17][18][19][20][21]. Among these modulation techniques, the carrier-based pulse width modulation (CB-PWM) approaches have been extensively preferred due to their simplicity of implementation.…”

“…The zero-sequence component is calculated at every switching period based on the dc-link link voltage and the grid current. Another type of offset voltage injection method was discussed in [15]. In this paper, the offset voltage with a distribution factor was added into the modulation signal.…”