A case study of electromigration reliability: From design point to system operations

Li, Baozhen; Müller, Paul J.; Warnock, J.; Sigal, L.; Badami, D.

doi:10.1109/irps.2015.7112680

Cited by 3 publications

(2 citation statements)

References 5 publications

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“…Conventionally, EM checking is invoked after the routing stage [36]. Current densities in metal wires are computed and compared with foundry-specified limits to detect EM failures.…”

Section: Em Optimization Flowmentioning

confidence: 99%

Dealing with Aging and Yield in Scaled Technologies

Alawieh

Hsu

et al. 2020

Dependable Embedded Systems

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This chapter reviews recent practices of tackling aging and yield issues in VLSI design related to shrinking technology processes. Different fundamental effects such as device aging, interconnect electromigration, and process variations are investigated with the state-of-the-art techniques for modeling and optimization. The presented techniques vary from analytical approaches to machine learning, and often require cross-layer information feedback for robust design cycles.

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“…Conventionally, EM checking is invoked after the routing stage [36]. Current densities in metal wires are computed and compared with foundry-specified limits to detect EM failures.…”

Section: Em Optimization Flowmentioning

confidence: 99%

Dealing with Aging and Yield in Scaled Technologies

Alawieh

Hsu

et al. 2020

Dependable Embedded Systems

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show abstract

“…These results agree with previous reports on high-temperature storage indicating that voids are clusters of vacancies in copper interconnects, migrating through grain boundaries along the stress gradient. 10,11) Some voids are located at the line edge [Fig. 5 The void area, depth, and volume are also summarized in Table II.…”

Section: Void Sizementioning

confidence: 99%

Voiding generation in copper interconnect under room temperature storage in 12 years

Matsuyama

Suzuki

Nakamura

et al. 2017

Jpn. J. Appl. Phys.

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We measured the internal residual stress change of ULSI copper interconnects at room temperature for 12 years to confirm the stress migration phenomenon. The residual stress decreased and voids were generated. Furthermore, we investigated the stress change results and void features obtained through physical analyses. The voids had the same features as those in the high-temperature storage. The estimated volume shrinkage agreed with the total volume of the observed voids, suggesting that void generation causes the decrease in stress. From the obtained result, we conclude that the stress migration degradation phenomenon occurs even at room temperature in the long-term storage, and that the void feature is almost identical to that in the high-temperature acceleration test.

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A Distributed Error and Anomaly Communication Architecture for Analog and Mixed-Signal Systems

Kundu

Goteti

2019

J Electron Test

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A case study of electromigration reliability: From design point to system operations

Cited by 3 publications

References 5 publications

Dealing with Aging and Yield in Scaled Technologies

Dealing with Aging and Yield in Scaled Technologies

Voiding generation in copper interconnect under room temperature storage in 12 years

A Distributed Error and Anomaly Communication Architecture for Analog and Mixed-Signal Systems

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