A Case Study of LLVM-Based Analysis for Optimizing SIMD Code Generation

Abstract

This paper presents a methodology for using LLVM-based tools to tune the DCA++ (dynamical cluster approximation) application that targets the new ARM A64FX processor. The goal is to describe the changes required for the new architecture and generate efficient single instruction/multiple data (SIMD) instructions that target the new Scalable Vector Extension instruction set. During manual tuning, the authors used the LLVM tools to improve code parallelization by using OpenMP SIMD, refactored the code and applied transformation that enabled SIMD optimizations, and ensured that the correct libraries were used to achieve optimal performance. By applying these code changes, code speed was increased by 1.98× and 78 GFlops were achieved on the A64FX processor. The authors aim to automatize parts of the efforts in the OpenMP Advisor tool, which is built on top of existing and newly introduced LLVM tooling.

A64FX -- Your Compiler You Must Decide!

“…Various publications and reports of A64FX evaluations have been released recently. For example, [14] tested LLVM and its SVE code generation capabilities for DCA++, and [15] compared a limited set of applications with LLVM, GNU, ARM, and Cray compilers and focused on SVE and multi-node scaling. Similarly, [16] investigated OpenMPscaling of 3 proxy apps on A64FX while comparing 5 compilers, and [17] measured nearly a dozen proxy apps (different from ours) on ARM and x86 for multiple compilers, but lacked LLVM.…”