A case study on logic diagnosis for System-on-Chip

Benabboud, Y.; Bosio, Alberto; Girard, Patrick; Pravossoudovitch, S.; Virazel, Arnaud; Bouzaida, L.; Izaute, Isabelle

doi:10.1109/isqed.2009.4810303

Cited by 5 publications

(1 citation statement)

References 17 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Existing effective system-level fault diagnosis techniques either apply only for boards [20] or, if they apply for SoCs, then they target the digital part of the SoC [21]. In particular, the individual blocks can be accessed and tested in isolation so as to identify the faulty block.…”

Section: System-level Fault Diagnosismentioning

confidence: 99%

Defect Diagnosis Techniques for Silicon Customer Returns

Girard¹,

Bosio²,

Ladhar³

et al. 2023

Frontiers of Quality Electronic Design (QED)

View full text Add to dashboard Cite

This chapter provides an overview of the various approaches and techniques proposed so far for defect diagnosis in silicon customer returns. It focuses on diagnosis of defects in logic blocks of SoCs. After some backgrounds on test and fault diagnosis, the chapter presents the various test scenarios used in practice during customer return diagnosis. A discussion on the quality required by the test sequences used during customer return is also proposed. Then, the chapter reviews the stateof-the-art techniques existing to identify defects at the cell level (called intra-cell or cell-aware diagnosis). A summary of conventional approaches is first proposed. Then, the latest Machine Learning (ML) -based cell-aware diagnosis techniques are reviewed. Effectiveness of existing ML techniques is shown through industrial case studies and corresponding diagnosis results in terms of accuracy and resolution. The chapter ends with a discussion on the future directions in this field.

show abstract

Section: System-level Fault Diagnosismentioning

confidence: 99%