Proceedings of the Fourth Asian Test Symposium
DOI: 10.1109/ats.1995.485311
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A cellular array designed from a Multiple-valued Decision Diagram and its fault tests

Naotake Kamiura
1
,
Yutaka Hata
2
,
K. Yamato
3
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Cited by 3 publications
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References 9 publications
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On design of fail-safe cellular arrays

Kamiura
1
,
Hata
2
,
Yamato
3
Proceedings of the Fifth Asian Test Symposium (ATS'96)
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4
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On design of fail-safe cellular arrays

Kamiura
1
,
Hata
2
,
Yamato
3
Proceedings of the Fifth Asian Test Symposium (ATS'96)
4
0
4
0
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Controllability/observability measures for multiple-valued test generation based on D-algorithm

Kamiura
1
,
Hata2,
Matsui3
Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000)
5
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PODEM based on static testability measures and dynamic testability measures for multiple-valued logic circuits

Kamiura
1
,
Isokawa
2
,
Matsui
3
Proceedings 32nd IEEE International Symposium on Multiple- Valued Logic
2
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2
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