A charge recycle refresh for Gb-scale DRAM's in file applications

Kawahara, Takayuki; Kawajiri, Y.; Horiguchi, Masashi; Akiba, T.; Kitsukawa, G.; Kure, T.; Aoki, Masakazu

doi:10.1109/4.293118

“…For memory devices these works have focused predominantly on circuit and architecture designs. More specifically, the works reported in the literature related to low-power implementation of memory include special cell structures [3,4], charge recycling [5], limited bitline swing [6], selected block activation [7]. However, all these works have suggested schemes for reducing power only in the physical point of view.…”

Section: Introductionmentioning

confidence: 99%

Conforming inverted data store for low power memory

Chang

¹

,

Park

²

,

Kyung

³

1999

Proceedings of the 1999 International Symposium on Low Power Electronics and Design - ISLPED '99

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In this paper, we propose a 'conforming inverted data store' scheme for reducing the power consumption in memory components. It reduces the power consumption by conforming memory contents to a precharging value of the memory. It selectively stores normal or inverted data so to reduce the total number of accessing bits different from the precharging value. In this way, bitline toggling during memory access is minimized and this ultimately contributes to a reduction in power consumption. We develop two practical implementations for the proposed method, that are vertical strip, and horizontal strip inversion schemes. Simulation results indicate that implementation of the strip-based inversion schemes contribute to a power reduction up to 50%.

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“…For memory devices these works have focused predominantly on circuit and architecture designs. More specifically, the works reported in the literature related to low-power implementation of memory include special cell structures [3,4], charge recycling [5], limited bitline swing [6], selected block activation [7]. However, all these works have suggested schemes for reducing power only in the physical point of view.…”

Section: Introductionmentioning

confidence: 99%

Conforming inverted data store for low power memory

Chang¹,

Park²,

Kyung³

Proceedings. 1999 International Symposium on Low Power Electronics and Design (Cat. No.99TH8477)

0

View full text Add to dashboard Cite

In this paper, we propose a 'conforming inverted data store' scheme for reducing the power consumption in memory components. It reduces the power consumption by conforming memory contents to a precharging value of the memory. It selectively stores normal or inverted data so to reduce the total number of accessing bits different from the precharging value. In this way, bitline toggling during memory access is minimized and this ultimately contributes to a reduction in power consumption. We develop two practical implementations for the proposed method, that are vertical strip, and horizontal strip inversion schemes. Simulation results indicate that implementation of the strip-based inversion schemes contribute to a power reduction up to 50%.

show abstract