A Coarse-Grained Reconfigurable Architecture with Compilation for High Performance

Wan, Lu; Dong, Chaoyu; Chen, Deming

doi:10.1155/2012/163542

Cited by 3 publications

(2 citation statements)

References 19 publications

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“…The green arrows, on the other hand, can enable the results from one RC to pass directly to the next RC in the vertical direction. This type of direct data transmission method is inspired by the FDR-CGRA [36] to reduce the global memory communication congestion. The local data bus is designed for data transmission between SBUs and RCs.…”

Section: A the Overview Of Sdt-cgramentioning

confidence: 99%

Stream Processing Dual-Track CGRA for Object Inference

Fan

Cao

et al. 2018

IEEE Trans. VLSI Syst.

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With the development of machine learning technology, the exploration of energy-efficient and flexible architectures for object inference algorithms is of growing interest in recent years. However, not many publications concentrate on coarsegrained reconfigurable architecture (CGRA) for object inference algorithms. This paper provides a stream processing, dual-track programming CGRA-based approach to address the inherent computing characteristics of algorithms in object inference. Based on the proposed approach, an architecture called SDT-CGRA is presented as an implementation prototype. To evaluate the performance, the SDT-CGRA is realized in Verilog HDL and implemented in SMIC 55nm process, with the footprint of 5.19 mm 2 at 450 MHz. Seven object inference algorithms including CNN, k-means, PCA, SPM, linear-SVM, Softmax and Joint-Bayesian are selected as benchmarks. The experimental results show that the SDT-CGRA can gain on average 343.8 times and 17.7 times higher energy efficiency for Softmax, PCA and CNN, 621.0 times and 1261.8 times higher energy efficiency for k-means, SPM, linear-SVM and Joint-Bayesian algorithms when compared to the Intel Xeon E5-2637 CPU and the Nvidia TitanX GPU. When compared to the state-of-ther-art solutions of AlexNet on FPGA and CGRA, the proposed SDT-CGRA can achieve a 1.78 times increase in energy efficiency and a 13 times speedup respectively.

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Section: A the Overview Of Sdt-cgramentioning

confidence: 99%

Stream Processing Dual-Track CGRA for Object Inference

Fan

Cao

et al. 2018

IEEE Trans. VLSI Syst.

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“…CGRAs consist of an array of functional units (FUs) interconnected by a mesh style network [9], with distributed register files to hold temporary values. This array of FUs provides computational power that is capable of doing byte-or word-level computations efficiently [10]. From the perspective of design methodology, in contrast to fine-grained bit-level FPGAs, CGRAs feature shorter synthesis and reconfiguration time by allowing easier mapping to the coarse-grained blocks with less configuration data compared to fine-grained FPGAs.…”

Section: Cgramentioning

confidence: 99%

Improving the productivity of high-level synthesis by advancing reuseability and verifiability

Yang¹

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for the kind support and advice. I would like to thank all the great people I work with in Advanced Digital Sciences Center, Singapore. I would like to thank Prof. Deming Chen for taking me into this world-class research team to pursue valuable research goals. I would like to thank all the teammates, Swathi Gurumani, Hongbin Zheng, Nguyen Quoc Duy Tan and Augustine Koh for their kind help and the fruitful collaboration. Meanwhile, I would like to thank all my past and present friends and colleagues in the Hardware and Embedded Systems Lab in Nanyang Technological University for making our days in Singapore much more interesting.Finally, with all of my heart, I wish to express my eternal gratitude to my family for their everlasting encouragement, consolation, understanding and selfless devotion. I want to thank my parents, Wang Mingying (王明瑛) and Yang Shunhe (杨顺和), for your endless love throughout my whole life and the huge support that backs me up when I cannot physically take care of Wanxin and Shaxi. You are the source of everything I become. I would like to thank my wife, Wang Wanxin (王万新), for sharing your whole life and faith with me, and bringing our baby to this world with all you have. It is my greatest blessing to have you as my beloved. I would like to thank my daughter, Yang Shaxi (杨沙溪), for coming into my life as the greatest gift ever and opening a new era of my life.

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