1992
DOI: 10.1109/82.204106
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A coding theory approach to error control in redundant residue number systems. I. Theory and single error correction

Abstract: In this work, a coding theory approach to error control in redundant residue number systems is presented. We introduce the concepts of Hamming weight, minimum distance, weight distribution, and error detection and correction capabilities in redundant residue number systems. The necessary and sufficient conditions for the desired error control capability are derived from the minimum distance point of view. Closed-form expressions are derived for approximate weight distributions. Finally, computationally efficie… Show more

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Cited by 109 publications
(85 citation statements)
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“…The performance of systematic and nonsystematic RRNS codes and near-optimal decoding algorithms for soft decision decoding has been proposed in [37]. The similarities and advantages of RRNS over other non-binary codes like Reed-Solomon (RS) codes has been discussed in detail in [23], [25]- [27], [30]- [38].…”
Section: Rns and Rrns Based Channel Codingmentioning
confidence: 99%
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“…The performance of systematic and nonsystematic RRNS codes and near-optimal decoding algorithms for soft decision decoding has been proposed in [37]. The similarities and advantages of RRNS over other non-binary codes like Reed-Solomon (RS) codes has been discussed in detail in [23], [25]- [27], [30]- [38].…”
Section: Rns and Rrns Based Channel Codingmentioning
confidence: 99%
“…Finally, the mapped symbols are constructed as space-time block codes and transmitted over multiple antennas. At the receiver, inverse operations including the use of Chinese Remainder Theorem (CRT) [30] to convert residues back to integers are implemented to recover the original information. We have derived upper bounds on the codeword and bit error probability of both non-systematic and systematic RRNS-STBC assuming ML detection and M-ary QAM constellation.…”
Section: Overview Of Thesismentioning
confidence: 99%
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“…The self-checking capabilities of adders with carry free implementations are widely known, while there are not many works proposing adders which provide also error correction capabilities. The most widely applied techniques to obtain error correction in adder circuits are based on time-redundancy [7] or on the residue number system representation [8], [9]. The goal of this paper is to introduce novel fault localization and graceful degradation methodology to be applied to a self checking adder [10] which uses the signed digit representation [11].…”
Section: Introductionmentioning
confidence: 99%