A Compact Wideband CMOS Low Noise Amplifier With Gain Flatness Enhancement

Yu, Yueh-Hua; Yang, Yong-Sian; Chen, Yi-Jan Emery

doi:10.1109/jssc.2010.2040111

Cited by 83 publications

(41 citation statements)

References 19 publications

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“…Adopting the modified folded cascode topology as gain cell in the proposed DA not only satisfies low‐supply voltage requirements but also suppresses the negative influence of Miller capacitance and leads to a wider bandwidth. The primary folded cascode configuration alleviates gain roll‐off, however, suffers from poor gain flatness at high frequencies . Hence, in order to remove this drawback, a gain‐peaking inductor of Lx is employed.…”

Section: Principles Of the Proposed Distributed Amplifier Designmentioning

confidence: 99%

Low‐power and low‐noise complementary metal oxide semiconductor distributed amplifier using the gain‐peaking technique

Saadi

Hakimi

2016

Circuit Theory & Apps

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Summary This paper presents an improved topology for ultra‐low‐power complementary metal oxide semiconductor (CMOS) distributed amplifier (DA) based on modified folded cascode gain cells. The proposed CMOS‐DA can be applicable in low‐supply‐voltage applications, because of the use of folded gain cell's structure. The proposed DA decreases power consumption by employing the forward body biasing network, while maintains high gain. By using a gain‐peaking inductor at the gate of the transistor, the proposed DA structure achieved to the gain flatness in high frequencies while the bandwidth is improved as well. In addition, employing RC network at the body terminal improves the noise performance of the proposed DA. The DA architecture consists of three amplification stages. Detailed analysis is provided for the proposed folded cascode DA. According to the post‐layout simulation results of the proposed amplifier using a 0.13‐µm CMOS process, DA achieves power gain of 17.3 ± 0.8 dB in bandwidth of 14.5 GHz, a good input third‐order intercept point (IIP3) of +5.5 dBm. The minimum noise figure is 1.8–5 dB, and input and output return losses are less than −11.5 dB and −10 dB, respectively, and the proposed structure consumes 12 mW from a 0.5 V voltage supply. Copyright © 2016 John Wiley & Sons, Ltd.

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Section: Principles Of the Proposed Distributed Amplifier Designmentioning

confidence: 99%

Low‐power and low‐noise complementary metal oxide semiconductor distributed amplifier using the gain‐peaking technique

Saadi

Hakimi

2016

Circuit Theory & Apps

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“…One approach to implement multiband receivers is to utilize multiple narrowband front-ends, which is in contrast to a single wideband front-end, the alternative approach, in terms of area, power, and cost. Besides this, single-ended input LNAs are preferred to save I/O pins and because antennas and RF filters usually produce single-ended signals [3].…”

Section: Introductionmentioning

confidence: 99%

An inductorless wideband LNA with a new noise canceling technique

Moghadam¹,

Abrishamifar²

2017

Turk J Elec Eng & Comp Sci

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An inductorless wideband low-noise amplifier (LNA) employing a new noise canceling technique for multistandard applications is presented. The main amplifier has a cascode common gate structure, which provides good input impedance matching and isolation. The proposed noise canceling technique not only improves the noise figure and power gain but also embeds a g m -boosting technique in itself, which reduces the power consumption of the main amplifier.Using current-steering and current-reuse techniques in the noise canceling branch makes the design realizable and low power. The proposed LNA is simulated and optimized in 0.13 µ m CMOS technology. The LNA achieves a noise figure of 2.8-3.4 dB, power gain of 19.2 dB, and input impedance matching better than -10.5 dB over bandwidth of 0.04-4.6GHz. It consumes only 8.5 mW from 1.2 V supply voltage, which makes it a low power LNA.

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“…The principle of flatness control system has been analyzed: the flatness deviation is calculated by target flatness and measure flatness sent by shapemeter roll. Under the unsaturated state of all the regulators, the adjustment keeps calculating until the flatness deviation is less than flatness setting precision . Due to the complication of initial flatness in the entire volume strip, the following phenomenon cannot be effectively avoided in rolling process: in the longitudinal direction, a large proportion of the strip can keep in good flatness except a small section of the strip.…”

Section: Introductionmentioning

confidence: 99%

“…Under the unsaturated state of all the regulators, the adjustment keeps calculating until the flatness deviation is less than flatness setting precision. [1] Due to the complication of initial flatness in the entire volume strip, the following phenomenon cannot be effectively avoided in rolling process: in the longitudinal direction, a large proportion of the strip can keep in good flatness except a small section of the strip. At this time, the common treatment is to make conventional intervention on the coefficient in flatness target curve.…”

Section: Introductionmentioning

confidence: 99%

Dynamic Optimization Model of Flatness Target Curve Based on Hybrid Intelligent Algorithm

Yan

Zhang

2016

steel research int.

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By the intelligent strategy of dynamic optimization in flatness target curve, the potential of the flatness control system can be completely fulfilled and the satisfying strip flatness can be speedily obtained. The traditional intervention pattern is static, open‐loop, non‐intelligent. In this paper, a new dynamic adjustment model of flatness target curve has been designed, by which the initial setpoint can be real‐timely regulated. The closed‐loop control system, equipped with the function of intelligent optimization and dynamic regulation, has been developed. A hybrid intelligent algorithm called ZOGE, in which both the searching definiteness and randomness are taken into account and the multipoint searching and single‐point searching are simultaneously carried through, has been proposed. The equivalent factor of flatness target curve has been optimized by function module HYBALO, which is developed on the basis of the hybrid intelligent algorithm and is operated on CFC configuration language in SIMATIC TDC controller. The testing in the field has been conducted through a 1450 mm 5‐stand tandem cold mill. The preliminary finding from the main results of testing in the field is reported: by means of the intelligent compensation model of flatness target curve, the content flatness quality of strip with thin thickness in slow rolling speed is effectively guaranteed. The maximum compensation efficiency of speed is 72.19%. The maximum compensation efficiency of thickness is 98.37%. The ability of eliminating strip flatness defect in dynamic regulation mode of flatness target curve is more powerful than the ability of eliminating strip flatness defect in conventional regulation mode.

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A Compact Wideband CMOS Low Noise Amplifier With Gain Flatness Enhancement

Cited by 83 publications

References 19 publications

Low‐power and low‐noise complementary metal oxide semiconductor distributed amplifier using the gain‐peaking technique

Low‐power and low‐noise complementary metal oxide semiconductor distributed amplifier using the gain‐peaking technique

An inductorless wideband LNA with a new noise canceling technique

Dynamic Optimization Model of Flatness Target Curve Based on Hybrid Intelligent Algorithm

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