A Comparative Study of Sorting Algorithms with FPGA Acceleration by High Level Synthesis

Jmaa, Yomna Ben; Atitallah, Rabıe Ben; Duvivier, David; Jemaa, Maher Ben

doi:10.13053/cys-23-1-2999

Cited by 15 publications

(10 citation statements)

References 23 publications

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“…The sorting-based techniques are more popular than the techniques that belong to the other category. Therefore, the literature includes many implementations of median filters using different sorting algorithms such as the bubble, insertion, selection, quick, heap, shell, merge, and timsort [2]. In these implementations, the effectiveness of these median filters depends mostly on the adopted sorting techniques' speed and efficiency.…”

Section: Background Of Median Filter Algorithmsmentioning

confidence: 99%

“…Furthermore, if the swapping between any couple of these locations is done, another swapping should be done to keep the validity of the reached relations. Such that, if swapping between P [6] and P [8] is occurred then swapping between P[0] and P [2] should be performed regardless their arrangement. Similarly, for the case of P [1] and P [3] if P [5] and P [7] are swapped.…”

Section: P[5]) (P[1] < P[6]) (P[2] < P[7]) and (P[3] < P[8]mentioning

confidence: 99%

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Optimized Algorithms and Hardware Implementation of Median Filter for Image Processing

Draz

Elashker

Mahmoud

2023

Circuits Syst Signal Process

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Image processing algorithms are essential for clarifying the image and improving the ability to recognize distinct characteristics of the image. The field of digital image processing is widespread in several research and technology applications. In many of these applications, the existence of impulsive noise in the obtained images is one of the most frequent problems. The median filter is a strong method to remove the impulsive noise; it effectively eliminates salt and pepper noise from the image. The main target of this paper is to investigate efficient median filter units to be connected to a general-purpose processor (GPP) for FPGA-based embedded systems. The paper exposes three novel techniques, two of them specially for median filtering techniques and the third one is used to get the maximum number of any 9 elements array. The proposed algorithms are inspired by the Median Of Median (MOM) algorithm. The first two techniques are tested for filtering $$3 \times 3$$ 3 × 3 image windows and optimized for producing the expected result in high accuracy, short time, and reduced number of comparisons. The last technique is tested for a 9 elements array for extracting the maximum number in same high efficiency manner. Furthermore, the three proposed techniques are implemented leveraging the advantage of the parallel processing and the FPGA flexible resources to satisfy the real-time processing constraints. A comparison between the first two proposed filtering units and their counterparts in the literature is included. The comparison reveals the superiority of the first technique in terms of accuracy with fewer comparators than previously published techniques. Besides, the paper illustrates how the concept beyond the proposed techniques can be used to perform the maximum pooling for convolution neural networks.

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Section: Background Of Median Filter Algorithmsmentioning

confidence: 99%

Section: P[5]) (P[1] < P[6]) (P[2] < P[7]) and (P[3] < P[8]mentioning

confidence: 99%

Optimized Algorithms and Hardware Implementation of Median Filter for Image Processing

Draz

Elashker

Mahmoud

2023

Circuits Syst Signal Process

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“…Sorting algorithms in software have been well researched for their time complexity and space complexity. The most suitable sorting algorithm for FPGAs is also considered [ 33 ] in our analysis. The evaluated sorting algorithms are BubbleSort (BS) due to its simplicity and MergeSort (MS) due to its performance.…”

Section: Algorithmsmentioning

confidence: 99%

Evaluation of Fast Sample Entropy Algorithms on FPGAs: From Performance to Energy Efficiency

Chen

Silva

Chen³

et al. 2022

Entropy

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Entropy is one of the most fundamental notions for understanding complexity. Among all the methods to calculate the entropy, sample entropy (SampEn) is a practical and common method to estimate time-series complexity. Unfortunately, SampEn is a time-consuming method growing in quadratic times with the number of elements, which makes this method unviable when processing large data series. In this work, we evaluate hardware SampEn architectures to offload computation weight, using improved SampEn algorithms and exploiting reconfigurable technologies, such as field-programmable gate arrays (FPGAs), a reconfigurable technology well-known for its high performance and power efficiency. In addition to the fundamental disclosed straightforward SampEn (SF) calculation method, this study evaluates optimized strategies, such as bucket-assist (BA) SampEn and lightweight SampEn based on BubbleSort (BS-LW) and MergeSort (MS-LW) on an embedded CPU, a high-performance CPU and on an FPGA using simulated data and real-world electrocardiograms (ECG) as input data. Irregular storage space and memory access of enhanced algorithms is also studied and estimated in this work. These fast SampEn algorithms are evaluated and profiled using metrics such as execution time, resource use, power and energy consumption based on input data length. Finally, although the implementation of fast SampEn is not significantly faster than versions running on a high-performance CPU, FPGA implementations consume one or two orders of magnitude less energy than a high-performance CPU.

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“…simple sorting Bubble sort, Insertion sort, dan Selection sort dengan menggunakan variabel temporary dapat mempengaruhi kecepatan [15], [16] serta tanpa variabel temporary [17], [18], [19], [20]. Durasi waktu dapat mempengaruhi kecepatan dalam menghasilkan informasi [21], [22].…”

Section: Penguji Kecepatanunclassified

Perbandingan Algoritma Simple Sorting Antara Menggunakan Variabel Temporary dan Tanpa Variabel Temporary

Arrosyidi¹,

Arnandy²

2022

jsisfotek

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Temporary variables used in swapping technique on sorting algorithm. There are alternative swapping techniques uses pairs of + and -, × and / operators in the sorting process. This study aims to determine the duration of the sorting process uses the + and - operator pairs, the × and / operator, and the uses of temporary variables. By knowing the duration, it can determine the performance of each swapping technique. Important of this research it can contribute for advanced research or applied research. Data generated input algorithms in descending and ascending sequence. The input was sorted by 18 types of Bubble, Selection, and Insertion sort algorithm. Output sequence contrary from the data input. Duration sorting process obtained from the end processed time subtract by the start processed time. Sorting duration recapitulated to get the average duration of the sorting process so can be compared between swapping techniques. The test method has run 18 types of Simple sorting algorithms from 10, 50, and 100 data variants. frequency of each variant 10 times tests. The total data used 28,800 of integer types. Result of the average duration test that swapping uses × and / operators 306,236 milliseconds uses + and - operators 294,998 milliseconds, and swapping technique with temporary variables 294,557 milliseconds. The best performance showed by swapping technique uses temporary variables instead of uses pair of + and – operators, also used pair of × and / operators

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A Comparative Study of Sorting Algorithms with FPGA Acceleration by High Level Synthesis

Cited by 15 publications

References 23 publications

Optimized Algorithms and Hardware Implementation of Median Filter for Image Processing

Optimized Algorithms and Hardware Implementation of Median Filter for Image Processing

Evaluation of Fast Sample Entropy Algorithms on FPGAs: From Performance to Energy Efficiency

Perbandingan Algoritma Simple Sorting Antara Menggunakan Variabel Temporary dan Tanpa Variabel Temporary

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