Proceedings of the 5th Program Protection and Reverse Engineering Workshop 2015
DOI: 10.1145/2843859.2843864
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A Complement to Enhanced Instruction Register File against Embedded Software Falsification

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(2 citation statements)
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“…These results imply that the addition of the positional register causes 10% decrease of system performance if the processor operates at the maximum possible frequency and the peripheral devices work at a proportional frequency to the processor's. We had already shown that the critical path of the Plasma processor included the decode stage [3], [17]. As the recovery of the original instruction with the positional register is done in the decode stage, it directly affected the critical path.…”
Section: Results Of Fpga Implementationmentioning
confidence: 99%
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“…These results imply that the addition of the positional register causes 10% decrease of system performance if the processor operates at the maximum possible frequency and the peripheral devices work at a proportional frequency to the processor's. We had already shown that the critical path of the Plasma processor included the decode stage [3], [17]. As the recovery of the original instruction with the positional register is done in the decode stage, it directly affected the critical path.…”
Section: Results Of Fpga Implementationmentioning
confidence: 99%
“…This problem can be solved by forcing IRF-resident instructions to be executed only by the corresponding special instructions. We have proposed a complementary unit, called IRRF (Instruction Rejection Register File) to achieve it [17].…”
Section: Instruction Register Filementioning
confidence: 99%